Digital Logic Design
محفوظ في:
| المؤلف الرئيسي: | |
|---|---|
| منشور في: |
2025
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| الوصول للمادة أونلاين: | http://hdl.handle.net/11675/14332 |
| الوسوم: |
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| _version_ | 1870679732663615489 |
|---|---|
| author | Sultan, Khalid |
| author_facet | Sultan, Khalid |
| author_role | author |
| dc.creator.none.fl_str_mv | Sultan, Khalid |
| dc.date.none.fl_str_mv | 2025 2026-05-20T06:41:43Z 2026-05-20T06:41:43Z |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | CPEG 210 http://hdl.handle.net/11675/14332 |
| dc.publisher.none.fl_str_mv | College of Engineering and Applied Sciences |
| dc.relation.none.fl_str_mv | Digital Design with an introduction to VHDL, 5th |
| dc.title.none.fl_str_mv | Digital Logic Design |
| dc.type.*.fl_str_mv | info:eu-repo/semantics/publishedVersion |
| id | AUKR_2a6d0543ec682c25547c4281e90fbbdb |
| identifier_str_mv | CPEG 210 |
| network_acronym_str | AUKR |
| network_name_str | AU Kuwait Rep |
| oai_identifier_str | oai:dspace.auk.edu.kw:11675/14332 |
| publishDate | 2025 |
| publisher.none.fl_str_mv | College of Engineering and Applied Sciences |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Digital Logic DesignSultan, KhalidCollege of Engineering and Applied Sciences2026-05-20T06:41:43Z2026-05-20T06:41:43Z2025application/pdfCPEG 210http://hdl.handle.net/11675/14332Digital Design with an introduction to VHDL, 5thinfo:eu-repo/semantics/publishedVersionoai:dspace.auk.edu.kw:11675/143322026-05-20T08:08:42Z |
| spellingShingle | Digital Logic Design Sultan, Khalid |
| status_str | publishedVersion |
| title | Digital Logic Design |
| title_full | Digital Logic Design |
| title_fullStr | Digital Logic Design |
| title_full_unstemmed | Digital Logic Design |
| title_short | Digital Logic Design |
| title_sort | Digital Logic Design |
| url | http://hdl.handle.net/11675/14332 |