Digital Logic Design Laboratory
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| Main Author: | |
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| Published: |
2025
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| Online Access: | http://hdl.handle.net/11675/14336 |
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| _version_ | 1870679734879256576 |
|---|---|
| author | Guindi, Marina |
| author_facet | Guindi, Marina |
| author_role | author |
| dc.creator.none.fl_str_mv | Guindi, Marina |
| dc.date.none.fl_str_mv | 2025 2026-05-20T06:41:44Z 2026-05-20T06:41:44Z |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | CPEG 210L http://hdl.handle.net/11675/14336 |
| dc.publisher.none.fl_str_mv | College of Engineering and Applied Sciences |
| dc.title.none.fl_str_mv | Digital Logic Design Laboratory |
| dc.type.*.fl_str_mv | info:eu-repo/semantics/publishedVersion |
| id | AUKR_a1f783b2e9ed6de7bb1033db4da7c035 |
| identifier_str_mv | CPEG 210L |
| network_acronym_str | AUKR |
| network_name_str | AU Kuwait Rep |
| oai_identifier_str | oai:dspace.auk.edu.kw:11675/14336 |
| publishDate | 2025 |
| publisher.none.fl_str_mv | College of Engineering and Applied Sciences |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Digital Logic Design LaboratoryGuindi, MarinaCollege of Engineering and Applied Sciences2026-05-20T06:41:44Z2026-05-20T06:41:44Z2025application/pdfCPEG 210Lhttp://hdl.handle.net/11675/14336info:eu-repo/semantics/publishedVersionoai:dspace.auk.edu.kw:11675/143362026-05-20T07:44:25Z |
| spellingShingle | Digital Logic Design Laboratory Guindi, Marina |
| status_str | publishedVersion |
| title | Digital Logic Design Laboratory |
| title_full | Digital Logic Design Laboratory |
| title_fullStr | Digital Logic Design Laboratory |
| title_full_unstemmed | Digital Logic Design Laboratory |
| title_short | Digital Logic Design Laboratory |
| title_sort | Digital Logic Design Laboratory |
| url | http://hdl.handle.net/11675/14336 |