A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip
One of the major challenges in testing a System-on-a-Chip (SOC) is dealing with the large test data size. To reduce the volume of test data, several efficient test data compression techniques have been recently proposed. In this paper, we propose hybrid test compression techniques that combine the G...
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| مؤلفون آخرون: | |
| التنسيق: | article |
| منشور في: |
2003
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/160/1/hybrid_compression_icecs2003.pdf |
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| _version_ | 1864513388184338432 |
|---|---|
| author | El-Maleh, Aiman H. |
| author2 | unknown |
| author2_role | author |
| author_facet | El-Maleh, Aiman H. unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | El-Maleh, Aiman H. unknown |
| dc.date.none.fl_str_mv | 2003-12 2020 |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/160/1/hybrid_compression_icecs2003.pdf (2003) A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip. 10th IEEE International Conference on Electronics, Circuits and Systems,. pp. 599-602. |
| dc.language.none.fl_str_mv | en |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/160/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | One of the major challenges in testing a System-on-a-Chip (SOC) is dealing with the large test data size. To reduce the volume of test data, several efficient test data compression techniques have been recently proposed. In this paper, we propose hybrid test compression techniques that combine the Geometric-Primitives-Based compression technique with the frequency-directed run-length (FDR) and extended frequencydirected run-length (EFDR) coding techniques. Based on experimental results, we demonstrate the effectiveness of the proposed hybrid compression techniques in increasing the test data compression ratios over those obtained by the Geometric- Primitives-Based compression technique. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_058e1a4e04050db94d8a86dffa37ded3 |
| identifier_str_mv | (2003) A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip. 10th IEEE International Conference on Electronics, Circuits and Systems,. pp. 599-602. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::160 |
| publishDate | 2003 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-ChipEl-Maleh, Aiman H.unknownComputerOne of the major challenges in testing a System-on-a-Chip (SOC) is dealing with the large test data size. To reduce the volume of test data, several efficient test data compression techniques have been recently proposed. In this paper, we propose hybrid test compression techniques that combine the Geometric-Primitives-Based compression technique with the frequency-directed run-length (FDR) and extended frequencydirected run-length (EFDR) coding techniques. Based on experimental results, we demonstrate the effectiveness of the proposed hybrid compression techniques in increasing the test data compression ratios over those obtained by the Geometric- Primitives-Based compression technique.2003-122020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/160/1/hybrid_compression_icecs2003.pdf (2003) A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip. 10th IEEE International Conference on Electronics, Circuits and Systems,. pp. 599-602. enhttps://eprints.kfupm.edu.sa/id/eprint/160/info:eu-repo/semantics/openAccessoai::1602019-11-01T13:22:40Z |
| spellingShingle | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip El-Maleh, Aiman H. Computer |
| status_str | publishedVersion |
| title | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| title_full | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| title_fullStr | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| title_full_unstemmed | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| title_short | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| title_sort | A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/160/1/hybrid_compression_icecs2003.pdf |