Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale
محفوظ في:
| المؤلف الرئيسي: | |
|---|---|
| مؤلفون آخرون: | |
| التنسيق: | masterThesis |
| منشور في: |
2009
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/136151/1/Farhan_Thesis.pdf |
| الوسوم: |
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| _version_ | 1864513384555216897 |
|---|---|
| author | Khan, Farhan |
| author2 | unknown |
| author2_role | author |
| author_facet | Khan, Farhan unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Khan, Farhan unknown |
| dc.date.none.fl_str_mv | 2009-09-26 2020 |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/136151/1/Farhan_Thesis.pdf (2009) Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale. Masters thesis, King Fahd University of Petroleum and Minerals. |
| dc.language.none.fl_str_mv | en |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/136151/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Engineering Computer |
| dc.title.none.fl_str_mv | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| dc.type.none.fl_str_mv | Thesis NonPeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/masterThesis |
| eu_rights_str_mv | openAccess |
| format | masterThesis |
| id | KFUPM_0fb30c7270df1977ead87773fd2679a6 |
| identifier_str_mv | (2009) Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale. Masters thesis, King Fahd University of Petroleum and Minerals. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::136151 |
| publishDate | 2009 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the NanoscaleKhan, FarhanunknownEngineeringComputer2009-09-262020ThesisNonPeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/136151/1/Farhan_Thesis.pdf (2009) Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale. Masters thesis, King Fahd University of Petroleum and Minerals. enhttps://eprints.kfupm.edu.sa/id/eprint/136151/info:eu-repo/semantics/openAccessoai::1361512019-11-01T14:11:15Z |
| spellingShingle | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale Khan, Farhan Engineering Computer |
| status_str | publishedVersion |
| title | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| title_full | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| title_fullStr | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| title_full_unstemmed | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| title_short | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| title_sort | Transistor-Level Defect-Tolerant Techniques for Reliable Design at the Nanoscale |
| topic | Engineering Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/136151/1/Farhan_Thesis.pdf |