Parallel Algorithm for Hardware Implementation of Inverse Halftoning

A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing m...

وصف كامل

محفوظ في:
التفاصيل البيبلوغرافية
المؤلف الرئيسي: Siddiqi, Umair F. (author)
مؤلفون آخرون: Sait, Sadiq M. (author), Farooqui, Aamir A. (author), unknown (author)
التنسيق: article
منشور في: 2005
الموضوعات:
الوصول للمادة أونلاين:https://eprints.kfupm.edu.sa/id/eprint/60/1/iscasp.pdf
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_version_ 1864513388170706944
author Siddiqi, Umair F.
author2 Sait, Sadiq M.
Farooqui, Aamir A.
unknown
author2_role author
author
author
author_facet Siddiqi, Umair F.
Sait, Sadiq M.
Farooqui, Aamir A.
unknown
author_role author
dc.creator.none.fl_str_mv Siddiqi, Umair F.
Sait, Sadiq M.
Farooqui, Aamir A.
unknown
dc.date.none.fl_str_mv 2005
2020
dc.format.none.fl_str_mv application/pdf
dc.identifier.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/60/1/iscasp.pdf
(2005) Parallel Algorithm for Hardware Implementation of Inverse Halftoning. IEEE Symposium on Circuits and Systems (ISCAS).
dc.language.none.fl_str_mv en
dc.relation.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/60/
dc.rights.*.fl_str_mv info:eu-repo/semantics/openAccess
dc.subject.none.fl_str_mv Computer
dc.title.none.fl_str_mv Parallel Algorithm for Hardware Implementation of Inverse Halftoning
dc.type.none.fl_str_mv Article
PeerReviewed
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/article
description A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The lookup table is divided into smaller lookup tables, such that each pattern selected at any time goes to a separate smaller lookup table. The 15-pixel parallel version of the algorithm was tested on sample images and a simple and effective method has been used to overcome quality degradation due to pixel loss in the proposed algorithm. It can provide at least 4 times decrease in lookup table size when compared with serial lookup table method implemented multiple times for same number of pixels.
eu_rights_str_mv openAccess
format article
id KFUPM_1e27e3d450eb9d325867ac130fb6199b
identifier_str_mv (2005) Parallel Algorithm for Hardware Implementation of Inverse Halftoning. IEEE Symposium on Circuits and Systems (ISCAS).
language_invalid_str_mv en
network_acronym_str KFUPM
network_name_str King Fahd University of Petroleum and Minerals
oai_identifier_str oai::60
publishDate 2005
repository.mail.fl_str_mv
repository.name.fl_str_mv
repository_id_str
spelling Parallel Algorithm for Hardware Implementation of Inverse HalftoningSiddiqi, Umair F.Sait, Sadiq M.Farooqui, Aamir A.unknownComputerA Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The lookup table is divided into smaller lookup tables, such that each pattern selected at any time goes to a separate smaller lookup table. The 15-pixel parallel version of the algorithm was tested on sample images and a simple and effective method has been used to overcome quality degradation due to pixel loss in the proposed algorithm. It can provide at least 4 times decrease in lookup table size when compared with serial lookup table method implemented multiple times for same number of pixels.20052020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/60/1/iscasp.pdf (2005) Parallel Algorithm for Hardware Implementation of Inverse Halftoning. IEEE Symposium on Circuits and Systems (ISCAS). enhttps://eprints.kfupm.edu.sa/id/eprint/60/info:eu-repo/semantics/openAccessoai::602019-11-01T13:22:04Z
spellingShingle Parallel Algorithm for Hardware Implementation of Inverse Halftoning
Siddiqi, Umair F.
Computer
status_str publishedVersion
title Parallel Algorithm for Hardware Implementation of Inverse Halftoning
title_full Parallel Algorithm for Hardware Implementation of Inverse Halftoning
title_fullStr Parallel Algorithm for Hardware Implementation of Inverse Halftoning
title_full_unstemmed Parallel Algorithm for Hardware Implementation of Inverse Halftoning
title_short Parallel Algorithm for Hardware Implementation of Inverse Halftoning
title_sort Parallel Algorithm for Hardware Implementation of Inverse Halftoning
topic Computer
url https://eprints.kfupm.edu.sa/id/eprint/60/1/iscasp.pdf