A static test compaction technique for combinational circuits based on independent fault clustering
Testing system-on-chip involves applying huge amounts of test data, which is stored in the tester memory and then transferred to the circuit under test during test application. Therefore, practical techniques, such as test compression and compaction, are required to reduce the amount of test data in...
Saved in:
| Main Author: | |
|---|---|
| Other Authors: | , |
| Format: | article |
| Published: |
2003
|
| Subjects: | |
| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/14098/1/14098_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14098/2/14098_2.doc |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|