A Systolic algorithm for VLSI design of a viterbi decoder.
Saved in:
| Main Author: | Damati, Ali Fiqhi (author) |
|---|---|
| Other Authors: | unknown (author) |
| Format: | masterThesis |
| Published: |
1988
|
| Subjects: | |
| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/9833/1/9833.pdf |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
A systolic algorithm for VLSI design of a 1/N rate Viterbi decoder
by: Sait, Sadiq M.
Published: (1989) -
VLSI DESIGN AND IMPLEMENTATION OF SYSTOLIC TREE QUEUES
by: Sait, Sadiq M.
Published: (2020) -
A framework for the VLSI implementation of systolic tree based data structures.
by: Khalid, Mohammed Abdul Aziz
Published: (1994) -
Modified algorithms for the decoding of hamming product codes
by: Al-Shaikhi, Ali Ahmad Saleh
Published: (2001) -
Fuzzy genetic algorithm for VLSI floorplan design.
by: Adiche, Hakim Salah.
Published: (1997)