A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip
The increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper, we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. Th...
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| Format: | article |
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2001
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/135/1/A_Geometric-Primitives-Based_Compression_Scheme_vts2001.pdf |
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| _version_ | 1864513388174901248 |
|---|---|
| author | El-Maleh, Aiman H. |
| author2 | Al Zahir, Saif Khan, Esam unknown |
| author2_role | author author author |
| author_facet | El-Maleh, Aiman H. Al Zahir, Saif Khan, Esam unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | El-Maleh, Aiman H. Al Zahir, Saif Khan, Esam unknown |
| dc.date.none.fl_str_mv | 2001 2020 |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/135/1/A_Geometric-Primitives-Based_Compression_Scheme_vts2001.pdf (2001) A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip. 19’th IEEE VLSI Test Symposium (VTS). pp. 54-59. |
| dc.language.none.fl_str_mv | en |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/135/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | The increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper, we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The technique exploits reordering of test vectors to minimize the number of shapes needed to encode the test data. The effectiveness of the technique in achieving high compression ratio is demonstrated on the largest ISCAS85 and full-scanned versions of ISCAS89 benchmark circuits. In this paper, it is assumed that an embedded core will be used to execute the decompression algorithm and decompress the test data. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_42e9f4c668a9b93494e4fb42241b0500 |
| identifier_str_mv | (2001) A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip. 19’th IEEE VLSI Test Symposium (VTS). pp. 54-59. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::135 |
| publishDate | 2001 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-ChipEl-Maleh, Aiman H.Al Zahir, SaifKhan, EsamunknownComputerThe increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper, we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The technique exploits reordering of test vectors to minimize the number of shapes needed to encode the test data. The effectiveness of the technique in achieving high compression ratio is demonstrated on the largest ISCAS85 and full-scanned versions of ISCAS89 benchmark circuits. In this paper, it is assumed that an embedded core will be used to execute the decompression algorithm and decompress the test data.20012020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/135/1/A_Geometric-Primitives-Based_Compression_Scheme_vts2001.pdf (2001) A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip. 19’th IEEE VLSI Test Symposium (VTS). pp. 54-59. enhttps://eprints.kfupm.edu.sa/id/eprint/135/info:eu-repo/semantics/openAccessoai::1352019-11-01T13:22:30Z |
| spellingShingle | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip El-Maleh, Aiman H. Computer |
| status_str | publishedVersion |
| title | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| title_full | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| title_fullStr | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| title_full_unstemmed | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| title_short | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| title_sort | A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/135/1/A_Geometric-Primitives-Based_Compression_Scheme_vts2001.pdf |