A novel technique for fast multiplication
In this paper we present the design of a new high speed multiplication unit. The design is based on non-overlapped scanning of 3-bit fields of the multiplier. In this algorithm the partial products of the multiplicand and three bits of the multiplier are pre-calculated using only hardwired shifts. T...
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| Format: | article |
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1995
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/14170/1/14170_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14170/2/14170_2.doc |
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| _version_ | 1864513402752204800 |
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| author | Sait, Sadiq M. |
| author2 | Farooqui, A.A. Beckhoff, G.F. unknown |
| author2_role | author author author |
| author_facet | Sait, Sadiq M. Farooqui, A.A. Beckhoff, G.F. unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Sait, Sadiq M. Farooqui, A.A. Beckhoff, G.F. unknown |
| dc.date.none.fl_str_mv | 1995-03 2020 |
| dc.format.none.fl_str_mv | application/pdf application/msword |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14170/1/14170_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14170/2/14170_2.doc (1995) A novel technique for fast multiplication. Computers and Communications, 1995. Conference Proceedings of the 1995 IEEE Fourteenth Annual International Phoenix conference, 1. |
| dc.language.none.fl_str_mv | en en |
| dc.publisher.none.fl_str_mv | IEEE |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14170/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | A novel technique for fast multiplication |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | In this paper we present the design of a new high speed multiplication unit. The design is based on non-overlapped scanning of 3-bit fields of the multiplier. In this algorithm the partial products of the multiplicand and three bits of the multiplier are pre-calculated using only hardwired shifts. These partial products are then added using a tree of carry-save-adders, and finally the sum and carry vectors are added using a carry-look-ahead adder. In case of 2's complement multiplication the tree of carry-save-adders also receives a correction output produced in parallel with the partial products. The algorithms is modeled in a hardware description language and its VLSI chip implemented. The performance of the new design is compared with other recent ones proposed in literature |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_44b012436337ba64ac777af5592c49fe |
| identifier_str_mv | (1995) A novel technique for fast multiplication. Computers and Communications, 1995. Conference Proceedings of the 1995 IEEE Fourteenth Annual International Phoenix conference, 1. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::14170 |
| publishDate | 1995 |
| publisher.none.fl_str_mv | IEEE |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | A novel technique for fast multiplicationSait, Sadiq M.Farooqui, A.A.Beckhoff, G.F.unknownComputerIn this paper we present the design of a new high speed multiplication unit. The design is based on non-overlapped scanning of 3-bit fields of the multiplier. In this algorithm the partial products of the multiplicand and three bits of the multiplier are pre-calculated using only hardwired shifts. These partial products are then added using a tree of carry-save-adders, and finally the sum and carry vectors are added using a carry-look-ahead adder. In case of 2's complement multiplication the tree of carry-save-adders also receives a correction output produced in parallel with the partial products. The algorithms is modeled in a hardware description language and its VLSI chip implemented. The performance of the new design is compared with other recent ones proposed in literatureIEEE1995-032020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfapplication/mswordhttps://eprints.kfupm.edu.sa/id/eprint/14170/1/14170_1.pdfhttps://eprints.kfupm.edu.sa/id/eprint/14170/2/14170_2.doc (1995) A novel technique for fast multiplication. Computers and Communications, 1995. Conference Proceedings of the 1995 IEEE Fourteenth Annual International Phoenix conference, 1. enenhttps://eprints.kfupm.edu.sa/id/eprint/14170/info:eu-repo/semantics/openAccessoai::141702019-11-01T14:04:33Z |
| spellingShingle | A novel technique for fast multiplication Sait, Sadiq M. Computer |
| status_str | publishedVersion |
| title | A novel technique for fast multiplication |
| title_full | A novel technique for fast multiplication |
| title_fullStr | A novel technique for fast multiplication |
| title_full_unstemmed | A novel technique for fast multiplication |
| title_short | A novel technique for fast multiplication |
| title_sort | A novel technique for fast multiplication |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/14170/1/14170_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14170/2/14170_2.doc |