Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach
محفوظ في:
| المؤلف الرئيسي: | |
|---|---|
| مؤلفون آخرون: | |
| التنسيق: | masterThesis |
| منشور في: |
2010
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/136331/1/Ayed_Thesis_final.pdf |
| الوسوم: |
إضافة وسم
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| _version_ | 1864513384830992384 |
|---|---|
| author | Al-Qahtani, Ayed Saad |
| author2 | unknown |
| author2_role | author |
| author_facet | Al-Qahtani, Ayed Saad unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Al-Qahtani, Ayed Saad unknown |
| dc.date.none.fl_str_mv | 2010-06-09 2020 |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/136331/1/Ayed_Thesis_final.pdf (2010) Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach. Masters thesis, King Fahd University of Petroleum and Minerals. |
| dc.language.none.fl_str_mv | en |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/136331/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Engineering Computer Electrical |
| dc.title.none.fl_str_mv | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| dc.type.none.fl_str_mv | Thesis NonPeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/masterThesis |
| eu_rights_str_mv | openAccess |
| format | masterThesis |
| id | KFUPM_84e6a6b2714c678b4fe946bb5646d9f0 |
| identifier_str_mv | (2010) Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach. Masters thesis, King Fahd University of Petroleum and Minerals. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::136331 |
| publishDate | 2010 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Fault Tolerance Techniques for Sequential Circuits: a Design Level ApproachAl-Qahtani, Ayed SaadunknownEngineeringComputerElectrical2010-06-092020ThesisNonPeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/136331/1/Ayed_Thesis_final.pdf (2010) Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach. Masters thesis, King Fahd University of Petroleum and Minerals. enhttps://eprints.kfupm.edu.sa/id/eprint/136331/info:eu-repo/semantics/openAccessoai::1363312019-11-01T15:28:02Z |
| spellingShingle | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach Al-Qahtani, Ayed Saad Engineering Computer Electrical |
| status_str | publishedVersion |
| title | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| title_full | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| title_fullStr | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| title_full_unstemmed | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| title_short | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| title_sort | Fault Tolerance Techniques for Sequential Circuits: a Design Level Approach |
| topic | Engineering Computer Electrical |
| url | https://eprints.kfupm.edu.sa/id/eprint/136331/1/Ayed_Thesis_final.pdf |