General iterative heuristics for VLSI multiobjective partitioning
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime i...
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| التنسيق: | article |
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2003
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| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/14329/1/14329_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14329/2/14329_2.doc |
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| _version_ | 1864513384095940608 |
|---|---|
| author | Sait, Sadiq M. |
| author2 | El-Maleh, A.H. Al-Abaji, R.H. unknown |
| author2_role | author author author |
| author_facet | Sait, Sadiq M. El-Maleh, A.H. Al-Abaji, R.H. unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Sait, Sadiq M. El-Maleh, A.H. Al-Abaji, R.H. unknown |
| dc.date.none.fl_str_mv | 2003-05 2020 |
| dc.format.none.fl_str_mv | application/pdf application/msword |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14329/1/14329_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14329/2/14329_2.doc (2003) General iterative heuristics for VLSI multiobjective partitioning. Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on, 5. |
| dc.language.none.fl_str_mv | en en |
| dc.publisher.none.fl_str_mv | IEEE |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14329/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | General iterative heuristics for VLSI multiobjective partitioning |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime importance. With current trends, partitioning with multiple objectives which includes power, delay and area, in addition to minimum cut is in vogue. In this paper, we engineer two iterative heuristics for the optimization of VLSI netlist bi-Partitioning. These heuristics are based on Genetic Algorithms (GAs) and Tabu Search (TS) and incorporate fuzzy rules in order to handle the multiobjective cost function. Both heuristics are applied to ISCAS-85/89 benchmark circuits and experimental results are reported and compared. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_8e7a26fe63a917f8421df98f9f65662e |
| identifier_str_mv | (2003) General iterative heuristics for VLSI multiobjective partitioning. Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on, 5. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::14329 |
| publishDate | 2003 |
| publisher.none.fl_str_mv | IEEE |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | General iterative heuristics for VLSI multiobjective partitioningSait, Sadiq M.El-Maleh, A.H.Al-Abaji, R.H.unknownComputerThe problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime importance. With current trends, partitioning with multiple objectives which includes power, delay and area, in addition to minimum cut is in vogue. In this paper, we engineer two iterative heuristics for the optimization of VLSI netlist bi-Partitioning. These heuristics are based on Genetic Algorithms (GAs) and Tabu Search (TS) and incorporate fuzzy rules in order to handle the multiobjective cost function. Both heuristics are applied to ISCAS-85/89 benchmark circuits and experimental results are reported and compared.IEEE2003-052020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfapplication/mswordhttps://eprints.kfupm.edu.sa/id/eprint/14329/1/14329_1.pdfhttps://eprints.kfupm.edu.sa/id/eprint/14329/2/14329_2.doc (2003) General iterative heuristics for VLSI multiobjective partitioning. Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on, 5. enenhttps://eprints.kfupm.edu.sa/id/eprint/14329/info:eu-repo/semantics/openAccessoai::143292019-11-01T14:05:21Z |
| spellingShingle | General iterative heuristics for VLSI multiobjective partitioning Sait, Sadiq M. Computer |
| status_str | publishedVersion |
| title | General iterative heuristics for VLSI multiobjective partitioning |
| title_full | General iterative heuristics for VLSI multiobjective partitioning |
| title_fullStr | General iterative heuristics for VLSI multiobjective partitioning |
| title_full_unstemmed | General iterative heuristics for VLSI multiobjective partitioning |
| title_short | General iterative heuristics for VLSI multiobjective partitioning |
| title_sort | General iterative heuristics for VLSI multiobjective partitioning |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/14329/1/14329_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14329/2/14329_2.doc |