Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering
Test compaction is an effective technique for reducing test data volume and test application time. In this paper, we present a new static test compaction technique based on test vector decomposition and clustering. Test vectors are decomposed and clustered for faults in an increasing order of faults...
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| Other Authors: | , |
| Format: | article |
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2007
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/158/1/Efficient_Test_Compaction_for_Combinational_Circuits_IET2006.pdf |
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| _version_ | 1864513388182241280 |
|---|---|
| author | El-Maleh, Aiman H. |
| author2 | Khursheed, S. Saqib unknown |
| author2_role | author author |
| author_facet | El-Maleh, Aiman H. Khursheed, S. Saqib unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | El-Maleh, Aiman H. Khursheed, S. Saqib unknown |
| dc.date.none.fl_str_mv | 2007 2020 |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/158/1/Efficient_Test_Compaction_for_Combinational_Circuits_IET2006.pdf (2007) Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering. IET Computers & Digital Techniques, 1 (4). pp. 364-368. |
| dc.language.none.fl_str_mv | en |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/158/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | Test compaction is an effective technique for reducing test data volume and test application time. In this paper, we present a new static test compaction technique based on test vector decomposition and clustering. Test vectors are decomposed and clustered for faults in an increasing order of faults detection count. This clustering order gives more degree of freedom and results in better compaction. Experimental results demonstrate the effectiveness of the proposed approach in achieving higher compaction in a much more efficient CPU time than previous clustering-based test compaction approaches. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_90874f1d00fdfc3bcb595af4d7500f22 |
| identifier_str_mv | (2007) Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering. IET Computers & Digital Techniques, 1 (4). pp. 364-368. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::158 |
| publishDate | 2007 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed ClusteringEl-Maleh, Aiman H.Khursheed, S. SaqibunknownComputerTest compaction is an effective technique for reducing test data volume and test application time. In this paper, we present a new static test compaction technique based on test vector decomposition and clustering. Test vectors are decomposed and clustered for faults in an increasing order of faults detection count. This clustering order gives more degree of freedom and results in better compaction. Experimental results demonstrate the effectiveness of the proposed approach in achieving higher compaction in a much more efficient CPU time than previous clustering-based test compaction approaches.20072020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/158/1/Efficient_Test_Compaction_for_Combinational_Circuits_IET2006.pdf (2007) Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering. IET Computers & Digital Techniques, 1 (4). pp. 364-368. enhttps://eprints.kfupm.edu.sa/id/eprint/158/info:eu-repo/semantics/openAccessoai::1582019-11-01T13:22:39Z |
| spellingShingle | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering El-Maleh, Aiman H. Computer |
| status_str | publishedVersion |
| title | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| title_full | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| title_fullStr | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| title_full_unstemmed | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| title_short | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| title_sort | Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/158/1/Efficient_Test_Compaction_for_Combinational_Circuits_IET2006.pdf |