A hybrid test compression technique for efficient testing of systems-on-a-chip
One of the major challenges in testing a System-on-a-Chip (SOC) is dealing with the large test data size. To reduce the volume of test data, several efficient test data compression techniques have been recently proposed. In this paper, we propose hybrid test compression techniques that combine the G...
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2003
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/14440/1/14440_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14440/2/14440_2.doc |
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| _version_ | 1864513384110620672 |
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| author | El-Maleh, A.H. |
| author2 | unknown |
| author2_role | author |
| author_facet | El-Maleh, A.H. unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | El-Maleh, A.H. unknown |
| dc.date.none.fl_str_mv | 2003-12 2020 |
| dc.format.none.fl_str_mv | application/pdf application/msword |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14440/1/14440_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14440/2/14440_2.doc (2003) A hybrid test compression technique for efficient testing of systems-on-a-chip. Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International conference, 2. |
| dc.language.none.fl_str_mv | en en |
| dc.publisher.none.fl_str_mv | IEEE |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14440/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | One of the major challenges in testing a System-on-a-Chip (SOC) is dealing with the large test data size. To reduce the volume of test data, several efficient test data compression techniques have been recently proposed. In this paper, we propose hybrid test compression techniques that combine the Geometric-Primitives-Based compression technique with the frequency-directed run-length (FDR) and extended frequency-directed run-length (EFDR) coding techniques. Based on experimental results, we demonstrate the effectiveness of the proposed hybrid compression techniques in increasing the test data compression ratios over those obtained by the Geometric-Primitives-Based compression technique. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_986fce1a3388ec5cce54d26b9fd91d5d |
| identifier_str_mv | (2003) A hybrid test compression technique for efficient testing of systems-on-a-chip. Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International conference, 2. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::14440 |
| publishDate | 2003 |
| publisher.none.fl_str_mv | IEEE |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | A hybrid test compression technique for efficient testing of systems-on-a-chipEl-Maleh, A.H.unknownComputerOne of the major challenges in testing a System-on-a-Chip (SOC) is dealing with the large test data size. To reduce the volume of test data, several efficient test data compression techniques have been recently proposed. In this paper, we propose hybrid test compression techniques that combine the Geometric-Primitives-Based compression technique with the frequency-directed run-length (FDR) and extended frequency-directed run-length (EFDR) coding techniques. Based on experimental results, we demonstrate the effectiveness of the proposed hybrid compression techniques in increasing the test data compression ratios over those obtained by the Geometric-Primitives-Based compression technique.IEEE2003-122020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfapplication/mswordhttps://eprints.kfupm.edu.sa/id/eprint/14440/1/14440_1.pdfhttps://eprints.kfupm.edu.sa/id/eprint/14440/2/14440_2.doc (2003) A hybrid test compression technique for efficient testing of systems-on-a-chip. Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International conference, 2. enenhttps://eprints.kfupm.edu.sa/id/eprint/14440/info:eu-repo/semantics/openAccessoai::144402019-11-01T14:05:49Z |
| spellingShingle | A hybrid test compression technique for efficient testing of systems-on-a-chip El-Maleh, A.H. Computer |
| status_str | publishedVersion |
| title | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| title_full | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| title_fullStr | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| title_full_unstemmed | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| title_short | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| title_sort | A hybrid test compression technique for efficient testing of systems-on-a-chip |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/14440/1/14440_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14440/2/14440_2.doc |