STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
Abstract The development of a digital circuit synthesis program is described. The program accepts the transition table of a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functi...
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| المؤلف الرئيسي: | |
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| مؤلفون آخرون: | , |
| التنسيق: | article |
| منشور في: |
2020
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/299/1/state_machine.pdf |
| الوسوم: |
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| الملخص: | Abstract The development of a digital circuit synthesis program is described. The program accepts the transition table of a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functions, nMOS VLSI layout for a Weinberger array is generated. D flip-flops are assumed for memory elements. Using this tool, tedious manual calculations can be avoided and layouts can be generated automatically from state table descriptions. Keywords: design |
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