STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS

Abstract The development of a digital circuit synthesis program is described. The program accepts the transition table of a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functi...

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محفوظ في:
التفاصيل البيبلوغرافية
المؤلف الرئيسي: Sait, Sadiq M. (author)
مؤلفون آخرون: El-Maleh, Aiman H. (author), unknown (author)
التنسيق: article
منشور في: 2020
الموضوعات:
الوصول للمادة أونلاين:https://eprints.kfupm.edu.sa/id/eprint/299/1/state_machine.pdf
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author Sait, Sadiq M.
author2 El-Maleh, Aiman H.
unknown
author2_role author
author
author_facet Sait, Sadiq M.
El-Maleh, Aiman H.
unknown
author_role author
dc.creator.none.fl_str_mv Sait, Sadiq M.
El-Maleh, Aiman H.
unknown
dc.date.*.fl_str_mv 2020
dc.format.none.fl_str_mv application/pdf
dc.identifier.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/299/1/state_machine.pdf
STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS. INTERNATIONAL JOURNAL OF ELECTRONICS 71 (1): 1-12 JUL 1991.
dc.language.none.fl_str_mv en
dc.relation.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/299/
dc.rights.*.fl_str_mv info:eu-repo/semantics/openAccess
dc.subject.none.fl_str_mv Computer
dc.title.none.fl_str_mv STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
dc.type.none.fl_str_mv Article
PeerReviewed
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/article
description Abstract The development of a digital circuit synthesis program is described. The program accepts the transition table of a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functions, nMOS VLSI layout for a Weinberger array is generated. D flip-flops are assumed for memory elements. Using this tool, tedious manual calculations can be avoided and layouts can be generated automatically from state table descriptions. Keywords: design
eu_rights_str_mv openAccess
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id KFUPM_988f347aaf27cf93aa130d6ea966ab57
identifier_str_mv STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS. INTERNATIONAL JOURNAL OF ELECTRONICS 71 (1): 1-12 JUL 1991.
language_invalid_str_mv en
network_acronym_str KFUPM
network_name_str King Fahd University of Petroleum and Minerals
oai_identifier_str oai::299
publishDate 2020
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spelling STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYSSait, Sadiq M.El-Maleh, Aiman H.unknownComputerAbstract The development of a digital circuit synthesis program is described. The program accepts the transition table of a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functions, nMOS VLSI layout for a Weinberger array is generated. D flip-flops are assumed for memory elements. Using this tool, tedious manual calculations can be avoided and layouts can be generated automatically from state table descriptions. Keywords: designArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/299/1/state_machine.pdf STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS. INTERNATIONAL JOURNAL OF ELECTRONICS 71 (1): 1-12 JUL 1991. enhttps://eprints.kfupm.edu.sa/id/eprint/299/2020info:eu-repo/semantics/openAccessoai::2992019-11-01T13:23:34Z
spellingShingle STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
Sait, Sadiq M.
Computer
status_str publishedVersion
title STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
title_full STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
title_fullStr STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
title_full_unstemmed STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
title_short STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
title_sort STATE MACHINE SYNTHESIS WITH WEINBERGER ARRAYS
topic Computer
url https://eprints.kfupm.edu.sa/id/eprint/299/1/state_machine.pdf