VLSI DESIGN AND IMPLEMENTATION OF SYSTOLIC TREE QUEUES
A number of innovative designs have been proposed for hardware implementation of data structures. However, these designs have only been presented at an abstract behavioural level. In this paper, we describe the VLSI design and implementation of a 15-node 8-bit queue based on a systolic tree architec...
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| Format: | article |
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2020
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/292/1/VLSI_design.pdf |
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