A geometric-primitives-based compression scheme for testingsystems-on-a-chip

The increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The...

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Main Author: El-Maleh, A. (author)
Other Authors: al Zahir, S. (author), Khan, E. (author), unknown (author)
Format: article
Published: 2001
Subjects:
Online Access:https://eprints.kfupm.edu.sa/id/eprint/14209/1/14209_1.pdf
https://eprints.kfupm.edu.sa/id/eprint/14209/2/14209_2.doc
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author El-Maleh, A.
author2 al Zahir, S.
Khan, E.
unknown
author2_role author
author
author
author_facet El-Maleh, A.
al Zahir, S.
Khan, E.
unknown
author_role author
dc.creator.none.fl_str_mv El-Maleh, A.
al Zahir, S.
Khan, E.
unknown
dc.date.none.fl_str_mv 2001
2020
dc.format.none.fl_str_mv application/pdf
application/msword
dc.identifier.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/14209/1/14209_1.pdf
https://eprints.kfupm.edu.sa/id/eprint/14209/2/14209_2.doc
(2001) A geometric-primitives-based compression scheme for testingsystems-on-a-chip. VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001, 1.
dc.language.none.fl_str_mv en
en
dc.publisher.none.fl_str_mv IEEE
dc.relation.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/14209/
dc.rights.*.fl_str_mv info:eu-repo/semantics/openAccess
dc.subject.none.fl_str_mv Computer
dc.title.none.fl_str_mv A geometric-primitives-based compression scheme for testingsystems-on-a-chip
dc.type.none.fl_str_mv Article
PeerReviewed
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/article
description The increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The technique exploits reordering of test vectors to minimize the number of shapes needed to encode the test data. The effectiveness of the technique in achieving high compression ratio is demonstrated on the largest ISCAS85 and full-scanned versions of ISCAS89 benchmark circuits. In this paper, it is assumed that an embedded core will be used to execute the decompression algorithm and decompress the test data
eu_rights_str_mv openAccess
format article
id KFUPM_b4a353cf34c8763c8b3cd738f7b8647e
identifier_str_mv (2001) A geometric-primitives-based compression scheme for testingsystems-on-a-chip. VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001, 1.
language_invalid_str_mv en
network_acronym_str KFUPM
network_name_str King Fahd University of Petroleum and Minerals
oai_identifier_str oai::14209
publishDate 2001
publisher.none.fl_str_mv IEEE
repository.mail.fl_str_mv
repository.name.fl_str_mv
repository_id_str
spelling A geometric-primitives-based compression scheme for testingsystems-on-a-chipEl-Maleh, A.al Zahir, S.Khan, E.unknownComputerThe increasing complexity of systems-on-a-chip with the accompanied increase in their test data size has made the need for test data reduction imperative. In this paper we introduce a novel and very efficient lossless compression technique for testing systems-on-a-chip based on geometric shapes. The technique exploits reordering of test vectors to minimize the number of shapes needed to encode the test data. The effectiveness of the technique in achieving high compression ratio is demonstrated on the largest ISCAS85 and full-scanned versions of ISCAS89 benchmark circuits. In this paper, it is assumed that an embedded core will be used to execute the decompression algorithm and decompress the test dataIEEE20012020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfapplication/mswordhttps://eprints.kfupm.edu.sa/id/eprint/14209/1/14209_1.pdfhttps://eprints.kfupm.edu.sa/id/eprint/14209/2/14209_2.doc (2001) A geometric-primitives-based compression scheme for testingsystems-on-a-chip. VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001, 1. enenhttps://eprints.kfupm.edu.sa/id/eprint/14209/info:eu-repo/semantics/openAccessoai::142092019-11-01T14:04:44Z
spellingShingle A geometric-primitives-based compression scheme for testingsystems-on-a-chip
El-Maleh, A.
Computer
status_str publishedVersion
title A geometric-primitives-based compression scheme for testingsystems-on-a-chip
title_full A geometric-primitives-based compression scheme for testingsystems-on-a-chip
title_fullStr A geometric-primitives-based compression scheme for testingsystems-on-a-chip
title_full_unstemmed A geometric-primitives-based compression scheme for testingsystems-on-a-chip
title_short A geometric-primitives-based compression scheme for testingsystems-on-a-chip
title_sort A geometric-primitives-based compression scheme for testingsystems-on-a-chip
topic Computer
url https://eprints.kfupm.edu.sa/id/eprint/14209/1/14209_1.pdf
https://eprints.kfupm.edu.sa/id/eprint/14209/2/14209_2.doc