Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks

Interrupt processing can be a major bottleneck in the end-to-end performance of high-speed networks. The performance of Gigabit network end hosts or servers can be severely degraded due to interrupt overhead caused by heavy incoming traffic. Under heavy network traffic, the system performance will b...

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التفاصيل البيبلوغرافية
المؤلف الرئيسي: Salah, Khaled (author)
مؤلفون آخرون: unknown (author)
التنسيق: article
منشور في: 2006
الموضوعات:
الوصول للمادة أونلاين:https://eprints.kfupm.edu.sa/id/eprint/716/1/JHSN_isr.pdf
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author Salah, Khaled
author2 unknown
author2_role author
author_facet Salah, Khaled
unknown
author_role author
dc.creator.none.fl_str_mv Salah, Khaled
unknown
dc.date.none.fl_str_mv 2006
2020
dc.format.none.fl_str_mv application/pdf
dc.identifier.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/716/1/JHSN_isr.pdf
(2006) Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks. International Journal of High Speed Networks, 16 (2). pp. 157-172.
dc.language.none.fl_str_mv en
dc.relation.none.fl_str_mv https://eprints.kfupm.edu.sa/id/eprint/716/
dc.rights.*.fl_str_mv info:eu-repo/semantics/openAccess
dc.subject.none.fl_str_mv Computer
dc.title.none.fl_str_mv Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
dc.type.none.fl_str_mv Article
NonPeerReviewed
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/article
description Interrupt processing can be a major bottleneck in the end-to-end performance of high-speed networks. The performance of Gigabit network end hosts or servers can be severely degraded due to interrupt overhead caused by heavy incoming traffic. Under heavy network traffic, the system performance will be negatively affected due to interrupt overhead caused by the incoming traffic. In particular, excessive latency and significant degradation in system throughput can be experienced. In this paper, we present a throughput-delay analysis of such behavior. We develop analytical models based on queueing theory and Markov processes. In our analysis, we consider and model three systems: ideal, PIO, and DMA. In ideal system, the interrupt overhead is ignored. In PIO, DMA is disabled and copying of incoming packets is performed by the CPU. In DMA, copying of incoming packet is performed by DMA engines. For high-speed network hosts, both PIO and DMA can be desirable configuration options. The analysis yields insight into understanding and predicting the impact of system and network choices on the performance of interrupt-driven systems when subjected to light and heavy network loads. Simulations and reported experimental results show that our analytical models are valid and give a good approximation.
eu_rights_str_mv openAccess
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identifier_str_mv (2006) Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks. International Journal of High Speed Networks, 16 (2). pp. 157-172.
language_invalid_str_mv en
network_acronym_str KFUPM
network_name_str King Fahd University of Petroleum and Minerals
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spelling Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed NetworksSalah, KhaledunknownComputerInterrupt processing can be a major bottleneck in the end-to-end performance of high-speed networks. The performance of Gigabit network end hosts or servers can be severely degraded due to interrupt overhead caused by heavy incoming traffic. Under heavy network traffic, the system performance will be negatively affected due to interrupt overhead caused by the incoming traffic. In particular, excessive latency and significant degradation in system throughput can be experienced. In this paper, we present a throughput-delay analysis of such behavior. We develop analytical models based on queueing theory and Markov processes. In our analysis, we consider and model three systems: ideal, PIO, and DMA. In ideal system, the interrupt overhead is ignored. In PIO, DMA is disabled and copying of incoming packets is performed by the CPU. In DMA, copying of incoming packet is performed by DMA engines. For high-speed network hosts, both PIO and DMA can be desirable configuration options. The analysis yields insight into understanding and predicting the impact of system and network choices on the performance of interrupt-driven systems when subjected to light and heavy network loads. Simulations and reported experimental results show that our analytical models are valid and give a good approximation.20062020ArticleNonPeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/716/1/JHSN_isr.pdf (2006) Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks. International Journal of High Speed Networks, 16 (2). pp. 157-172. enhttps://eprints.kfupm.edu.sa/id/eprint/716/info:eu-repo/semantics/openAccessoai::7162019-11-01T13:25:03Z
spellingShingle Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
Salah, Khaled
Computer
status_str publishedVersion
title Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
title_full Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
title_fullStr Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
title_full_unstemmed Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
title_short Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
title_sort Throughput-Delay Analysis of Interrupt-Driven Kernels with DMA Enabled and Disabled in High-Speed Networks
topic Computer
url https://eprints.kfupm.edu.sa/id/eprint/716/1/JHSN_isr.pdf