Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers
In this paper, a fast hardware architecture for elliptic curve cryptography computation in Galois Field GF(p) is proposed. The architecture is implemented for 160-bits, as its data size to handle. The design adopts projective coordinates to eliminate most of the required GF(p) inversion calculations...
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| المؤلف الرئيسي: | |
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| مؤلفون آخرون: | |
| التنسيق: | article |
| منشور في: |
2006
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/168/1/D.pdf https://eprints.kfupm.edu.sa/id/eprint/168/2/d.htm |
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| _version_ | 1864513388474793984 |
|---|---|
| author | Gutub, Adnan |
| author2 | unknown |
| author2_role | author |
| author_facet | Gutub, Adnan unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Gutub, Adnan unknown |
| dc.date.none.fl_str_mv | 2006-10 2020 |
| dc.format.none.fl_str_mv | application/pdf text/html |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/168/1/D.pdf https://eprints.kfupm.edu.sa/id/eprint/168/2/d.htm (2006) Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers. International Arab Journal of Information Technology (IAJIT), 3 (4). pp. 342-349. ISSN 1683-3198 |
| dc.language.none.fl_str_mv | en en |
| dc.publisher.none.fl_str_mv | Zarqa Private University |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/168/ http://www.iajit.org/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Math Computer Electrical |
| dc.title.none.fl_str_mv | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | In this paper, a fast hardware architecture for elliptic curve cryptography computation in Galois Field GF(p) is proposed. The architecture is implemented for 160-bits, as its data size to handle. The design adopts projective coordinates to eliminate most of the required GF(p) inversion calculations replacing them with several multiplication operations. The hardware is intended to be scalable, which allows the hardware to compute long precision numbers in a repetitive way. The design involves four parallel scalable multipliers to gain the best speed. This scalable design was implemented in different versions depending on the area and speed. All scalable implementations were compared with an available FPGA design. The proposed scalable hardware showed interesting results in both area and speed. It also showed some area-time flexibility to accommodate the variation needed by different crypto applications. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_f7cd005cec9d62d7145a30ba64d5784d |
| identifier_str_mv | (2006) Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers. International Arab Journal of Information Technology (IAJIT), 3 (4). pp. 342-349. ISSN 1683-3198 |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::168 |
| publishDate | 2006 |
| publisher.none.fl_str_mv | Zarqa Private University |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable MultipliersGutub, AdnanunknownMathComputerElectricalIn this paper, a fast hardware architecture for elliptic curve cryptography computation in Galois Field GF(p) is proposed. The architecture is implemented for 160-bits, as its data size to handle. The design adopts projective coordinates to eliminate most of the required GF(p) inversion calculations replacing them with several multiplication operations. The hardware is intended to be scalable, which allows the hardware to compute long precision numbers in a repetitive way. The design involves four parallel scalable multipliers to gain the best speed. This scalable design was implemented in different versions depending on the area and speed. All scalable implementations were compared with an available FPGA design. The proposed scalable hardware showed interesting results in both area and speed. It also showed some area-time flexibility to accommodate the variation needed by different crypto applications.Zarqa Private University2006-102020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdftext/htmlhttps://eprints.kfupm.edu.sa/id/eprint/168/1/D.pdfhttps://eprints.kfupm.edu.sa/id/eprint/168/2/d.htm (2006) Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers. International Arab Journal of Information Technology (IAJIT), 3 (4). pp. 342-349. ISSN 1683-3198 enenhttps://eprints.kfupm.edu.sa/id/eprint/168/http://www.iajit.org/info:eu-repo/semantics/openAccessoai::1682019-11-01T13:22:44Z |
| spellingShingle | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers Gutub, Adnan Math Computer Electrical |
| status_str | publishedVersion |
| title | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| title_full | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| title_fullStr | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| title_full_unstemmed | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| title_short | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| title_sort | Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers |
| topic | Math Computer Electrical |
| url | https://eprints.kfupm.edu.sa/id/eprint/168/1/D.pdf https://eprints.kfupm.edu.sa/id/eprint/168/2/d.htm |