A method for efficient NoC test scheduling using deterministic routing
Network-on-Chip (NoC) is an on-chip communication methodology that has been proposed as an alternative to bus-based communication in order to cope with the increased complexity in embedded designs. This paper presents a method for NoCs test scheduling using simulated annealing. The method uses a det...
Saved in:
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | conferenceObject |
| Published: |
2017
|
| Online Access: | http://hdl.handle.net/10725/5451 http://dx.doi.org/10.1109/SOCC.2010.5784696 http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php http://ieeexplore.ieee.org/abstract/document/5784696/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1864513477052203008 |
|---|---|
| author | Harmanani, Haidar |
| author2 | Farah, Rana |
| author2_role | author |
| author_facet | Harmanani, Haidar Farah, Rana |
| author_role | author |
| dc.creator.none.fl_str_mv | Harmanani, Haidar Farah, Rana |
| dc.date.none.fl_str_mv | 2017-03-29T08:16:13Z 2017-03-29T08:16:13Z 2017-03-29 |
| dc.identifier.none.fl_str_mv | 978-1-4244-6683-2 http://hdl.handle.net/10725/5451 http://dx.doi.org/10.1109/SOCC.2010.5784696 Farah, R., & Harmanani, H. (2010, September). A method for efficient NoC test scheduling using deterministic routing. In SOC Conference (SOCC), 2010 IEEE International (pp. 363-366). IEEE. http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php http://ieeexplore.ieee.org/abstract/document/5784696/ |
| dc.language.none.fl_str_mv | en |
| dc.publisher.none.fl_str_mv | IEEE |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.title.none.fl_str_mv | A method for efficient NoC test scheduling using deterministic routing |
| dc.type.none.fl_str_mv | Conference Paper / Proceeding info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/conferenceObject |
| description | Network-on-Chip (NoC) is an on-chip communication methodology that has been proposed as an alternative to bus-based communication in order to cope with the increased complexity in embedded designs. This paper presents a method for NoCs test scheduling using simulated annealing. The method uses a deterministic routing algorithm that minimizes test time while avoiding blocking. The method is implemented and various benchmarks are attempted. |
| eu_rights_str_mv | openAccess |
| format | conferenceObject |
| id | LAURepo_1d8b76cce45cd07769ca7eecb68bdb26 |
| identifier_str_mv | 978-1-4244-6683-2 Farah, R., & Harmanani, H. (2010, September). A method for efficient NoC test scheduling using deterministic routing. In SOC Conference (SOCC), 2010 IEEE International (pp. 363-366). IEEE. |
| language_invalid_str_mv | en |
| network_acronym_str | LAURepo |
| network_name_str | Lebanese American University repository |
| oai_identifier_str | oai:laur.lau.edu.lb:10725/5451 |
| publishDate | 2017 |
| publisher.none.fl_str_mv | IEEE |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | A method for efficient NoC test scheduling using deterministic routingHarmanani, HaidarFarah, RanaNetwork-on-Chip (NoC) is an on-chip communication methodology that has been proposed as an alternative to bus-based communication in order to cope with the increased complexity in embedded designs. This paper presents a method for NoCs test scheduling using simulated annealing. The method uses a deterministic routing algorithm that minimizes test time while avoiding blocking. The method is implemented and various benchmarks are attempted.N/AIEEE2017-03-29T08:16:13Z2017-03-29T08:16:13Z2017-03-29Conference Paper / Proceedinginfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject978-1-4244-6683-2http://hdl.handle.net/10725/5451http://dx.doi.org/10.1109/SOCC.2010.5784696Farah, R., & Harmanani, H. (2010, September). A method for efficient NoC test scheduling using deterministic routing. In SOC Conference (SOCC), 2010 IEEE International (pp. 363-366). IEEE.http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.phphttp://ieeexplore.ieee.org/abstract/document/5784696/eninfo:eu-repo/semantics/openAccessoai:laur.lau.edu.lb:10725/54512021-03-19T10:00:47Z |
| spellingShingle | A method for efficient NoC test scheduling using deterministic routing Harmanani, Haidar |
| status_str | publishedVersion |
| title | A method for efficient NoC test scheduling using deterministic routing |
| title_full | A method for efficient NoC test scheduling using deterministic routing |
| title_fullStr | A method for efficient NoC test scheduling using deterministic routing |
| title_full_unstemmed | A method for efficient NoC test scheduling using deterministic routing |
| title_short | A method for efficient NoC test scheduling using deterministic routing |
| title_sort | A method for efficient NoC test scheduling using deterministic routing |
| url | http://hdl.handle.net/10725/5451 http://dx.doi.org/10.1109/SOCC.2010.5784696 http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php http://ieeexplore.ieee.org/abstract/document/5784696/ |