Priority-Driven Area Optimization in High-Level Synthesis
One of the major enhancements that can be made to the high-level synthesis (HLS) process is reducing the overall area of a design in order to either decrease the manufacturing costs or to introduce more functionality to the circuit. Optimizing the area of the datapath is considered a primary field o...
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2011
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| Online Access: | http://hdl.handle.net/10725/3169 http://dx.doi.org/10.1142/S0218126611007803 http://www.worldscientific.com/doi/abs/10.1142/S0218126611007803 |
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