Methods for system-on-chip test design, scheduling and optimization. (c2006)
Includes bibliographical references (leaves. 48-50).
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| Format: | masterThesis |
| Published: |
2006
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10725/922 https://doi.org/10.26756/th.2006.51 |
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