Resource allocation and reallocation techniques in high-level synthesis with testability constraint
The increase in density that the advent of Very Large Scale Integration (VLSI) has allowed, made the move to higher levels of design abstraction imperative. High Level Synthesis emerged as a result; however, most solutions (1) were not optimal; (2) did not incorporate testing at the system level. In...
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| Main Author: | Harmanani, Haidar M. (author) |
|---|---|
| Format: | masterThesis |
| Published: |
1994
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| Online Access: | http://hdl.handle.net/10725/7647 http://libraries.lau.edu.lb/research/laur/terms-of-use/thesis.php https://etd.ohiolink.edu/pg_10?0::NO:10:P10_ACCESSION_NUM:case1057758522 |
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