A multiobjective optimization method for the SOC Test Time, TAM, and power optimization using a strength pareto evolutionary algorithm
System-On-Chip (SOCs) test minimization is an important problem that has been receiving considerable attention. The problem is tightly coupled with the number of TAM bits, power, and wrapper design. This paper presents a multiobjective optimization approach for the SOC test scheduling problem. The m...
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| Format: | conferenceObject |
| Published: |
2017
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| Online Access: | http://hdl.handle.net/10725/7632 http://dx.doi.org/10.1007/978-3-319-54978-1_86 http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php https://link.springer.com/content/pdf/10.1007%2F978-3-319-54978-1_86.pdf |
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