Power-constrained system-on-a-chip test scheduling using a genetic algorithm

Power-constrained system-on-a-chip test scheduling using a genetic algorithm

This paper presents an efficient approach for the test scheduling problem of core-based systems based on a genetic algorithm. The method minimizes the overall test application time of a system-on-a-chip through efficient and compact test schedules. The problem is solved using a "sessionless&quo...

وصف كامل

محفوظ في:

التفاصيل البيبلوغرافية
المؤلف الرئيسي:	Harmanani, Haidar M. (author)
مؤلفون آخرون:	Salamy, Hassan A. (author)
التنسيق:	article
منشور في:	2006
الوصول للمادة أونلاين:	http://hdl.handle.net/10725/3529 http://dx.doi.org/10.1142/S0218126606003106 http://www.worldscientific.com/doi/abs/10.1142/S0218126606003106
الوسوم:	إضافة وسم لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!

مواد مشابهة

On Power-Constrained System-on-chip Test Scheduling Using Precedence Relationships
حسب: Harmanani, Haidar M.
منشور في: (2017)

A Simulated Annealing Algorithm for System-on-Chip Test Scheduling with, Power and Precedence Constraints
حسب: Harmanani, Haidar M.
منشور في: (2006)

An optimal formulation for test scheduling network-on-chip using multiple clock rates
حسب: Harmanani, Haidar M.
منشور في: (2017)

Thermal-aware test scheduling using network-on-chip under multiple clock rates
حسب: Harmanani, Haidar M.
منشور في: (2013)

An effective solution to thermal-aware test scheduling on network-on-chip using multiple clock rates
حسب: Harmanani, Haidar
منشور في: (2017)

Concurrent BIST Synthesis and Test Scheduling Using Genetic Algorithms
حسب: Harmanani, H. M.
منشور في: (2007)

An incremental approach for test scheduling and synthesis using genetic algorithms
حسب: Harmanani, H.
منشور في: (2017)

Test time minimization for system-on-chip with test bus assignment and sizin
حسب: Harmanani, Haidar M.
منشور في: (2017)

Test bus assignment, sizing, and partitioning for system-on-chip
حسب: Harmanani, Haidar M.
منشور في: (2007)

A method for optimizing test bus assignment and sizing for system-on-a-chip
حسب: Harmanani, Haidar M.
منشور في: (2017)

A Parallel Genetic Algorithm for the Open-Shop Scheduling Problem Using Deterministic and Random Moves
حسب: Harmanani, Haidar M.
منشور في: (2016)

Methods for system-on-chip test design, scheduling and optimization. (c2006)
حسب: Farah, Rana
منشور في: (2006)

A method for efficient NoC test scheduling using deterministic routing
حسب: Harmanani, Haidar
منشور في: (2017)

An incremental approach for test synthesis and scheduling using genetic algorithms. (c2002)
حسب: Hajar, Aouni
منشور في: (2002)

A method for the minimum coloring problem using genetic algorithms
حسب: Harmanani, Haidar
منشور في: (2006)

Integrating wrapper design, TAM assignment, and test scheduling for SOC test optimization
حسب: Harmanani, Haidar M.
منشور في: (2017)

A hybrid distributed test generation method using deterministic and genetic algorithms
حسب: Harmanani, H.
منشور في: (2017)

A multiobjective optimization method for the SOC Test Time, TAM, and power optimization using a strength pareto evolutionary algorithm
حسب: Harmanani, Haidar M.
منشور في: (2017)

A parallel genetic algorithm for the geometrically constrained site layout problem
حسب: Zouein, P.
منشور في: (2018)

A hybrid test compression technique for efficient testing of systems-on-a-chip
حسب: El-Maleh, A.H.
منشور في: (2003)

A Hybrid Test Compression Technique for Efficient Testing of Systems-on-a-Chip
حسب: El-Maleh, Aiman H.
منشور في: (2003)

Integrated test scheduling, wrapper design, and TAM assignment for hierarchical SOC
حسب: Harmanani, Haidar M.
منشور في: (2017)

Scheduling and allocation in high-level synthesis using genetic algorithm
حسب: Ali, Shahid
منشور في: (1994)

Genetic Algorithm for Solving Site Layout Problem with Unequal-Size and Constrained Facilities
حسب: Zouein, P. P.
منشور في: (2002)

A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip
حسب: El-Maleh, Aiman H.
منشور في: (2001)

A Parallel Genetic Algorithm for the Geometrically Constrained Site Layout Problem with Unequal-Size Facilities
حسب: Zouein, Pierrette P.
منشور في: (2010)

Deep Reinforcement Learning for Resource Constrained HLS Scheduling
حسب: Makhoul, Rim
منشور في: (2022)

A distributed genetic algorithm for deterministic and stochastic labor scheduling problems
حسب: Mansour, Nashat
منشور في: (1999)

Built-in self test logic for a histogrammer memory chip
حسب: Hamzah, Azzam Ahmad
منشور في: (1993)

An Uncertainty Based Genetic Algorithm Approach for Project Resource Scheduling
حسب: ALKETBI, SAIF
منشور في: (2016)

Simulated annealing and genetic algorithms for exam scheduling. (c1997)
حسب: Tarhini, Abbas A.
منشور في: (1997)

Genetic algorithm based test data generator
حسب: Hermadi, Irman
منشور في: (2004)

Efficient techniques for testing networks on chips. (c2010)
حسب: Abou Eid, Nancy
منشور في: (2010)

Estimating test cost during data path and controller synthesis with low power overhead
حسب: Harmanani, Haidar M.
منشور في: (2017)

GENETIC SCHEDULING OF TASK GRAPHS
حسب: Benten, M. S.
منشور في: (2020)

An efficient method for the open-shop scheduling problem using simulated annealing
حسب: Harmanani, Haidar M.
منشور في: (2016)

A Two-dimensional geometric-shapes-based compression scheme for deterministic testing of systems-on-a-chip
حسب: Khan, Esam Ali Hasan
منشور في: (2001)

Optimal multiobjective design of robust power system stabilizers using genetic algorithms
حسب: Abdel-Magid, Y.L.
منشور في: (2003)

Power based scheduling algorithms for WCDMA networks
حسب: Shareef, Mohammed Yousuf
منشور في: (2006)

A genetic algorithm for testable data path synthesis
حسب: Harmanani, H.
منشور في: (2017)