Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count
<p>Multilevel inverters remain an area of research interest due to the superior performance against a two-level counterpart. Reducing the switch count and stress on the power electronic switches while maintaining a sinusoidal stepped output remains a challenge. A multilevel inverter topology h...
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| منشور في: |
2021
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| _version_ | 1864513560398266368 |
|---|---|
| author | Mohammad Fahad (12849162) |
| author2 | Marif Daula Siddique (14425209) Atif Iqbal (5504636) Adil Sarwar (16855491) Saad Mekhilef (724278) |
| author2_role | author author author author |
| author_facet | Mohammad Fahad (12849162) Marif Daula Siddique (14425209) Atif Iqbal (5504636) Adil Sarwar (16855491) Saad Mekhilef (724278) |
| author_role | author |
| dc.creator.none.fl_str_mv | Mohammad Fahad (12849162) Marif Daula Siddique (14425209) Atif Iqbal (5504636) Adil Sarwar (16855491) Saad Mekhilef (724278) |
| dc.date.none.fl_str_mv | 2021-03-09T00:00:00Z |
| dc.identifier.none.fl_str_mv | 10.1109/access.2021.3064982 |
| dc.relation.none.fl_str_mv | https://figshare.com/articles/journal_contribution/Implementation_and_Analysis_of_a_15-Level_Inverter_Topology_With_Reduced_Switch_Count/24049263 |
| dc.rights.none.fl_str_mv | CC BY 4.0 info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Engineering Electrical engineering Topology Switches Through-silicon vias Power harmonic filters Multilevel inverters Capacitors Voltage control Nearest level control (NLC) Power converters Total harmonic distortion (THD) |
| dc.title.none.fl_str_mv | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| dc.type.none.fl_str_mv | Text Journal contribution info:eu-repo/semantics/publishedVersion text contribution to journal |
| description | <p>Multilevel inverters remain an area of research interest due to the superior performance against a two-level counterpart. Reducing the switch count and stress on the power electronic switches while maintaining a sinusoidal stepped output remains a challenge. A multilevel inverter topology has been proposed in this work which utilizes twelve switches and four dc voltage sources to produce a 15-level staircase output voltage waveform. The objective is to reduce the harmonic in the output voltage and thereby reducing the cost of filter requirement and maintaining high efficiency throughout the operating range. Control of output voltage has been done using the Nearest Level Pulse Width Modulation Strategy (NLPWM). Simulation and hardware implementation of the topology under different loads and dynamic conditions are presented to validate the robust performance.</p><h2>Other Information</h2><p>Published in: IEEE Access<br>License: <a href="https://creativecommons.org/licenses/by/4.0/legalcode" target="_blank">https://creativecommons.org/licenses/by/4.0/</a><br>See article on publisher's website: <a href="https://dx.doi.org/10.1109/access.2021.3064982" target="_blank">https://dx.doi.org/10.1109/access.2021.3064982</a></p> |
| eu_rights_str_mv | openAccess |
| id | Manara2_44cac3f6bbddbc403f4416934f0d7f2a |
| identifier_str_mv | 10.1109/access.2021.3064982 |
| network_acronym_str | Manara2 |
| network_name_str | Manara2 |
| oai_identifier_str | oai:figshare.com:article/24049263 |
| publishDate | 2021 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| rights_invalid_str_mv | CC BY 4.0 |
| spelling | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch CountMohammad Fahad (12849162)Marif Daula Siddique (14425209)Atif Iqbal (5504636)Adil Sarwar (16855491)Saad Mekhilef (724278)EngineeringElectrical engineeringTopologySwitchesThrough-silicon viasPower harmonic filtersMultilevel invertersCapacitorsVoltage controlNearest level control (NLC)Power convertersTotal harmonic distortion (THD)<p>Multilevel inverters remain an area of research interest due to the superior performance against a two-level counterpart. Reducing the switch count and stress on the power electronic switches while maintaining a sinusoidal stepped output remains a challenge. A multilevel inverter topology has been proposed in this work which utilizes twelve switches and four dc voltage sources to produce a 15-level staircase output voltage waveform. The objective is to reduce the harmonic in the output voltage and thereby reducing the cost of filter requirement and maintaining high efficiency throughout the operating range. Control of output voltage has been done using the Nearest Level Pulse Width Modulation Strategy (NLPWM). Simulation and hardware implementation of the topology under different loads and dynamic conditions are presented to validate the robust performance.</p><h2>Other Information</h2><p>Published in: IEEE Access<br>License: <a href="https://creativecommons.org/licenses/by/4.0/legalcode" target="_blank">https://creativecommons.org/licenses/by/4.0/</a><br>See article on publisher's website: <a href="https://dx.doi.org/10.1109/access.2021.3064982" target="_blank">https://dx.doi.org/10.1109/access.2021.3064982</a></p>2021-03-09T00:00:00ZTextJournal contributioninfo:eu-repo/semantics/publishedVersiontextcontribution to journal10.1109/access.2021.3064982https://figshare.com/articles/journal_contribution/Implementation_and_Analysis_of_a_15-Level_Inverter_Topology_With_Reduced_Switch_Count/24049263CC BY 4.0info:eu-repo/semantics/openAccessoai:figshare.com:article/240492632021-03-09T00:00:00Z |
| spellingShingle | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count Mohammad Fahad (12849162) Engineering Electrical engineering Topology Switches Through-silicon vias Power harmonic filters Multilevel inverters Capacitors Voltage control Nearest level control (NLC) Power converters Total harmonic distortion (THD) |
| status_str | publishedVersion |
| title | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| title_full | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| title_fullStr | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| title_full_unstemmed | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| title_short | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| title_sort | Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count |
| topic | Engineering Electrical engineering Topology Switches Through-silicon vias Power harmonic filters Multilevel inverters Capacitors Voltage control Nearest level control (NLC) Power converters Total harmonic distortion (THD) |