Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count
<p>The inceptions of multilevel inverters (MLI) have caught the attention of researchers for medium and high power applications. However, there has always been a need for a topology with a lower number of device count for higher efficiency and reliability. A new single-phase MLI topology has b...
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2019
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| _version_ | 1864513561165824000 |
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| author | Marif Daula Siddique (14425209) |
| author2 | Saad Mekhilef (724278) Noraisyah Mohamed Shah (16855488) Adil Sarwar (16855491) Atif Iqbal (5504636) Mohammad Tayyab (4259854) Mohsin Karim Ansari (16855542) |
| author2_role | author author author author author author |
| author_facet | Marif Daula Siddique (14425209) Saad Mekhilef (724278) Noraisyah Mohamed Shah (16855488) Adil Sarwar (16855491) Atif Iqbal (5504636) Mohammad Tayyab (4259854) Mohsin Karim Ansari (16855542) |
| author_role | author |
| dc.creator.none.fl_str_mv | Marif Daula Siddique (14425209) Saad Mekhilef (724278) Noraisyah Mohamed Shah (16855488) Adil Sarwar (16855491) Atif Iqbal (5504636) Mohammad Tayyab (4259854) Mohsin Karim Ansari (16855542) |
| dc.date.none.fl_str_mv | 2019-07-17T00:00:00Z |
| dc.identifier.none.fl_str_mv | 10.1109/access.2019.2925277 |
| dc.relation.none.fl_str_mv | https://figshare.com/articles/journal_contribution/Low_Switching_Frequency_Based_Asymmetrical_Multilevel_Inverter_Topology_With_Reduced_Switch_Count/23994879 |
| dc.rights.none.fl_str_mv | CC BY 4.0 info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Engineering Electrical engineering Electronics, sensors and digital hardware Mathematical sciences Pure mathematics Topology Switches Through-silicon vias Inverters Stress Power supplies Mathematical model DC–AC converter Multilevel inverter Reduce switch count Nearest level control (NLC) |
| dc.title.none.fl_str_mv | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| dc.type.none.fl_str_mv | Text Journal contribution info:eu-repo/semantics/publishedVersion text contribution to journal |
| description | <p>The inceptions of multilevel inverters (MLI) have caught the attention of researchers for medium and high power applications. However, there has always been a need for a topology with a lower number of device count for higher efficiency and reliability. A new single-phase MLI topology has been proposed in this paper to reduce the number of switches in the circuit and obtain higher voltage level at the output. The basic unit of the proposed topology produces 13 levels at the output with three dc voltage sources and eight switches. Three extentions of the basic unit have been proposed in this paper. A detailed analysis of the proposed topology has been carried out to show the superiority of the proposed converter with respect to the other existing MLI topologies. Power loss analysis has been done using PLECS software, resulting in a maximum efficiency of 98.5%. Nearest level control (NLC) pulse-width modulation technique has been used to produce gate pulses for the switches to achieve better output voltage waveform. The various simulation results have been performed in the PLECS software and a laboratory setup has been used to show the feasibility of the proposed MLI topology.</p><h2>Other Information</h2><p>Published in: IEEE Access<br>License: <a href="https://creativecommons.org/licenses/by/4.0/legalcode" target="_blank">https://creativecommons.org/licenses/by/4.0/</a><br>See article on publisher's website: <a href="https://dx.doi.org/10.1109/access.2019.2925277" target="_blank">https://dx.doi.org/10.1109/access.2019.2925277</a></p> |
| eu_rights_str_mv | openAccess |
| id | Manara2_83c3e408fdaeac87e4bfc2aaf4fbc98e |
| identifier_str_mv | 10.1109/access.2019.2925277 |
| network_acronym_str | Manara2 |
| network_name_str | Manara2 |
| oai_identifier_str | oai:figshare.com:article/23994879 |
| publishDate | 2019 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| rights_invalid_str_mv | CC BY 4.0 |
| spelling | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch CountMarif Daula Siddique (14425209)Saad Mekhilef (724278)Noraisyah Mohamed Shah (16855488)Adil Sarwar (16855491)Atif Iqbal (5504636)Mohammad Tayyab (4259854)Mohsin Karim Ansari (16855542)EngineeringElectrical engineeringElectronics, sensors and digital hardwareMathematical sciencesPure mathematicsTopologySwitchesThrough-silicon viasInvertersStressPower suppliesMathematical modelDC–AC converterMultilevel inverterReduce switch countNearest level control (NLC)<p>The inceptions of multilevel inverters (MLI) have caught the attention of researchers for medium and high power applications. However, there has always been a need for a topology with a lower number of device count for higher efficiency and reliability. A new single-phase MLI topology has been proposed in this paper to reduce the number of switches in the circuit and obtain higher voltage level at the output. The basic unit of the proposed topology produces 13 levels at the output with three dc voltage sources and eight switches. Three extentions of the basic unit have been proposed in this paper. A detailed analysis of the proposed topology has been carried out to show the superiority of the proposed converter with respect to the other existing MLI topologies. Power loss analysis has been done using PLECS software, resulting in a maximum efficiency of 98.5%. Nearest level control (NLC) pulse-width modulation technique has been used to produce gate pulses for the switches to achieve better output voltage waveform. The various simulation results have been performed in the PLECS software and a laboratory setup has been used to show the feasibility of the proposed MLI topology.</p><h2>Other Information</h2><p>Published in: IEEE Access<br>License: <a href="https://creativecommons.org/licenses/by/4.0/legalcode" target="_blank">https://creativecommons.org/licenses/by/4.0/</a><br>See article on publisher's website: <a href="https://dx.doi.org/10.1109/access.2019.2925277" target="_blank">https://dx.doi.org/10.1109/access.2019.2925277</a></p>2019-07-17T00:00:00ZTextJournal contributioninfo:eu-repo/semantics/publishedVersiontextcontribution to journal10.1109/access.2019.2925277https://figshare.com/articles/journal_contribution/Low_Switching_Frequency_Based_Asymmetrical_Multilevel_Inverter_Topology_With_Reduced_Switch_Count/23994879CC BY 4.0info:eu-repo/semantics/openAccessoai:figshare.com:article/239948792019-07-17T00:00:00Z |
| spellingShingle | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count Marif Daula Siddique (14425209) Engineering Electrical engineering Electronics, sensors and digital hardware Mathematical sciences Pure mathematics Topology Switches Through-silicon vias Inverters Stress Power supplies Mathematical model DC–AC converter Multilevel inverter Reduce switch count Nearest level control (NLC) |
| status_str | publishedVersion |
| title | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| title_full | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| title_fullStr | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| title_full_unstemmed | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| title_short | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| title_sort | Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count |
| topic | Engineering Electrical engineering Electronics, sensors and digital hardware Mathematical sciences Pure mathematics Topology Switches Through-silicon vias Inverters Stress Power supplies Mathematical model DC–AC converter Multilevel inverter Reduce switch count Nearest level control (NLC) |