Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing
<p dir="ltr">This paper proposes a power-up calibration scheme to mitigate the offset of a capacitive-gain chopper instrumentation amplifier (CCIA), thus suppressing the offset-induced output ripple. In this design, the first stage of the error amplifier is formed by multiple identic...
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2021
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| _version_ | 1864513560212668416 |
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| author | Tsz Ngai Lin (16888791) |
| author2 | Bo Wang (86769) Amine Bermak (1895947) |
| author2_role | author author |
| author_facet | Tsz Ngai Lin (16888791) Bo Wang (86769) Amine Bermak (1895947) |
| author_role | author |
| dc.creator.none.fl_str_mv | Tsz Ngai Lin (16888791) Bo Wang (86769) Amine Bermak (1895947) |
| dc.date.none.fl_str_mv | 2021-08-05T00:00:00Z |
| dc.identifier.none.fl_str_mv | 10.1109/tcsi.2021.3100752 |
| dc.relation.none.fl_str_mv | https://figshare.com/articles/journal_contribution/Ripple_Suppression_in_Capacitive-Gain_Chopper_Instrumentation_Amplifier_Using_Amplifier_Slicing/24038970 |
| dc.rights.none.fl_str_mv | CC BY 4.0 info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Engineering Electrical engineering Electronics, sensors and digital hardware Calibration Choppers (circuits) Instruments Capacitors Bandwidth Mathematical model Frequency modulation Capacitive-gain chopper instrumentation amplifier Ripple reduction CCIA Amplifier slicing Bandwidth and noise scaling |
| dc.title.none.fl_str_mv | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| dc.type.none.fl_str_mv | Text Journal contribution info:eu-repo/semantics/publishedVersion text contribution to journal |
| description | <p dir="ltr">This paper proposes a power-up calibration scheme to mitigate the offset of a capacitive-gain chopper instrumentation amplifier (CCIA), thus suppressing the offset-induced output ripple. In this design, the first stage of the error amplifier is formed by multiple identical slices. Before normal operation, the offset polarity of each slice is determined by reusing the second stage of the amplifier as a comparator. With such polarity information, slices of the first stage are regrouped to achieve a statistical offset reduction. The proposed amplifier has been fabricated in a standard 0.18 μm CMOS process with an area of 0.57 mm <sup>2</sup>, achieving an average peak-to-peak output ripple of 58 mV. The amplifier consumes 1.53 μW with a 1.2 V supply. Compared to the state-of-the-art, the calibration time of the proposed scheme is much shorter (14 clock cycles) and the overhead logic consumes no static power after calibration. In addition, the slicing technique provides an extra degree of freedom to the amplifier for bandwidth and noise scaling.</p><h2>Other Information</h2><p dir="ltr">Published in: IEEE Transactions on Circuits and Systems I: Regular Papers<br>License: <a href="https://creativecommons.org/licenses/by/4.0/legalcode" target="_blank">https://creativecommons.org/licenses/by/4.0/</a><br>See article on publisher's website: <a href="https://dx.doi.org/10.1109/tcsi.2021.3100752" target="_blank">https://dx.doi.org/10.1109/tcsi.2021.3100752</a></p> |
| eu_rights_str_mv | openAccess |
| id | Manara2_a8768ea91f745da4f554fc245dd38c09 |
| identifier_str_mv | 10.1109/tcsi.2021.3100752 |
| network_acronym_str | Manara2 |
| network_name_str | Manara2 |
| oai_identifier_str | oai:figshare.com:article/24038970 |
| publishDate | 2021 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| rights_invalid_str_mv | CC BY 4.0 |
| spelling | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier SlicingTsz Ngai Lin (16888791)Bo Wang (86769)Amine Bermak (1895947)EngineeringElectrical engineeringElectronics, sensors and digital hardwareCalibrationChoppers (circuits)InstrumentsCapacitorsBandwidthMathematical modelFrequency modulationCapacitive-gain chopper instrumentation amplifierRipple reductionCCIAAmplifier slicingBandwidth and noise scaling<p dir="ltr">This paper proposes a power-up calibration scheme to mitigate the offset of a capacitive-gain chopper instrumentation amplifier (CCIA), thus suppressing the offset-induced output ripple. In this design, the first stage of the error amplifier is formed by multiple identical slices. Before normal operation, the offset polarity of each slice is determined by reusing the second stage of the amplifier as a comparator. With such polarity information, slices of the first stage are regrouped to achieve a statistical offset reduction. The proposed amplifier has been fabricated in a standard 0.18 μm CMOS process with an area of 0.57 mm <sup>2</sup>, achieving an average peak-to-peak output ripple of 58 mV. The amplifier consumes 1.53 μW with a 1.2 V supply. Compared to the state-of-the-art, the calibration time of the proposed scheme is much shorter (14 clock cycles) and the overhead logic consumes no static power after calibration. In addition, the slicing technique provides an extra degree of freedom to the amplifier for bandwidth and noise scaling.</p><h2>Other Information</h2><p dir="ltr">Published in: IEEE Transactions on Circuits and Systems I: Regular Papers<br>License: <a href="https://creativecommons.org/licenses/by/4.0/legalcode" target="_blank">https://creativecommons.org/licenses/by/4.0/</a><br>See article on publisher's website: <a href="https://dx.doi.org/10.1109/tcsi.2021.3100752" target="_blank">https://dx.doi.org/10.1109/tcsi.2021.3100752</a></p>2021-08-05T00:00:00ZTextJournal contributioninfo:eu-repo/semantics/publishedVersiontextcontribution to journal10.1109/tcsi.2021.3100752https://figshare.com/articles/journal_contribution/Ripple_Suppression_in_Capacitive-Gain_Chopper_Instrumentation_Amplifier_Using_Amplifier_Slicing/24038970CC BY 4.0info:eu-repo/semantics/openAccessoai:figshare.com:article/240389702021-08-05T00:00:00Z |
| spellingShingle | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing Tsz Ngai Lin (16888791) Engineering Electrical engineering Electronics, sensors and digital hardware Calibration Choppers (circuits) Instruments Capacitors Bandwidth Mathematical model Frequency modulation Capacitive-gain chopper instrumentation amplifier Ripple reduction CCIA Amplifier slicing Bandwidth and noise scaling |
| status_str | publishedVersion |
| title | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| title_full | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| title_fullStr | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| title_full_unstemmed | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| title_short | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| title_sort | Ripple Suppression in Capacitive-Gain Chopper Instrumentation Amplifier Using Amplifier Slicing |
| topic | Engineering Electrical engineering Electronics, sensors and digital hardware Calibration Choppers (circuits) Instruments Capacitors Bandwidth Mathematical model Frequency modulation Capacitive-gain chopper instrumentation amplifier Ripple reduction CCIA Amplifier slicing Bandwidth and noise scaling |