IAM and IEM muxes control code.

<div><p>CRYSTALS-Kyber has been standardized by the National Institute of Standards and Technology (NIST) as a quantum-resistant algorithm in the post-quantum cryptography (PQC) competition. The bottleneck in performance of Kyber is the polynomial multiplication based on Number Theoretic...

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التفاصيل البيبلوغرافية
المؤلف الرئيسي: Ayesha Waris (21368446) (author)
مؤلفون آخرون: Arshad Aziz (3342512) (author), Bilal Muhammad Khan (16050362) (author)
منشور في: 2025
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_version_ 1852020382227234816
author Ayesha Waris (21368446)
author2 Arshad Aziz (3342512)
Bilal Muhammad Khan (16050362)
author2_role author
author
author_facet Ayesha Waris (21368446)
Arshad Aziz (3342512)
Bilal Muhammad Khan (16050362)
author_role author
dc.creator.none.fl_str_mv Ayesha Waris (21368446)
Arshad Aziz (3342512)
Bilal Muhammad Khan (16050362)
dc.date.none.fl_str_mv 2025-05-15T15:42:10Z
dc.identifier.none.fl_str_mv 10.1371/journal.pone.0323224.t001
dc.relation.none.fl_str_mv https://figshare.com/articles/dataset/IAM_and_IEM_muxes_control_code_/29077000
dc.rights.none.fl_str_mv CC BY 4.0
info:eu-repo/semantics/openAccess
dc.subject.none.fl_str_mv Microbiology
Biological Sciences not elsewhere classified
Information Systems not elsewhere classified
twiddle factor storage
target fpga platform
resource sharing technique
propose various optimizations
polynomial multiplication based
path delay commutator
number theoretic transform
minimize resource consumption
input output coefficients
based modular multiplier
based memory units
xlink "> crystals
kyber </ p
xilinx artix
using 29
time product
rom memories
resistant algorithm
pwm operations
presented architectures
ntt ).
national institute
intt architecture
comparable atp
art architectures
architectural level
7 xc7a100t
dc.title.none.fl_str_mv IAM and IEM muxes control code.
dc.type.none.fl_str_mv Dataset
info:eu-repo/semantics/publishedVersion
dataset
description <div><p>CRYSTALS-Kyber has been standardized by the National Institute of Standards and Technology (NIST) as a quantum-resistant algorithm in the post-quantum cryptography (PQC) competition. The bottleneck in performance of Kyber is the polynomial multiplication based on Number Theoretic transform (NTT). This work presents two parallel architectures adopting Multi-Path Delay Commutator (MDC) approach on target FPGA platform. Resource sharing technique is adopted to perform PWM operations using MDC NTT/INTT architecture. Moreover, we propose various optimizations at architectural level to minimize resource consumption such as FIFO-based memory units for buffering of input output coefficients, LUT-based modular multiplier and distributed-ROM memories for twiddle factor storage. The presented architectures are implemented on Xilinx Artix-7 XC7A100T-3 device using Vivado Design Suite 2022.2 and coded using Verilog HDL. Our BRAM and DSP-free designs achieve 68% improved area-time product with a comparable ATP for PWM operations. Additionally, the two-parallel MDC architecture outperforms state-of-the-art architectures, using 29% fewer resources.</p></div>
eu_rights_str_mv openAccess
id Manara_c927dadc9db47ad2ca3e13aba2b8dc08
identifier_str_mv 10.1371/journal.pone.0323224.t001
network_acronym_str Manara
network_name_str ManaraRepo
oai_identifier_str oai:figshare.com:article/29077000
publishDate 2025
repository.mail.fl_str_mv
repository.name.fl_str_mv
repository_id_str
rights_invalid_str_mv CC BY 4.0
spelling IAM and IEM muxes control code.Ayesha Waris (21368446)Arshad Aziz (3342512)Bilal Muhammad Khan (16050362)MicrobiologyBiological Sciences not elsewhere classifiedInformation Systems not elsewhere classifiedtwiddle factor storagetarget fpga platformresource sharing techniquepropose various optimizationspolynomial multiplication basedpath delay commutatornumber theoretic transformminimize resource consumptioninput output coefficientsbased modular multiplierbased memory unitsxlink "> crystalskyber </ pxilinx artixusing 29time productrom memoriesresistant algorithmpwm operationspresented architecturesntt ).national instituteintt architecturecomparable atpart architecturesarchitectural level7 xc7a100t<div><p>CRYSTALS-Kyber has been standardized by the National Institute of Standards and Technology (NIST) as a quantum-resistant algorithm in the post-quantum cryptography (PQC) competition. The bottleneck in performance of Kyber is the polynomial multiplication based on Number Theoretic transform (NTT). This work presents two parallel architectures adopting Multi-Path Delay Commutator (MDC) approach on target FPGA platform. Resource sharing technique is adopted to perform PWM operations using MDC NTT/INTT architecture. Moreover, we propose various optimizations at architectural level to minimize resource consumption such as FIFO-based memory units for buffering of input output coefficients, LUT-based modular multiplier and distributed-ROM memories for twiddle factor storage. The presented architectures are implemented on Xilinx Artix-7 XC7A100T-3 device using Vivado Design Suite 2022.2 and coded using Verilog HDL. Our BRAM and DSP-free designs achieve 68% improved area-time product with a comparable ATP for PWM operations. Additionally, the two-parallel MDC architecture outperforms state-of-the-art architectures, using 29% fewer resources.</p></div>2025-05-15T15:42:10ZDatasetinfo:eu-repo/semantics/publishedVersiondataset10.1371/journal.pone.0323224.t001https://figshare.com/articles/dataset/IAM_and_IEM_muxes_control_code_/29077000CC BY 4.0info:eu-repo/semantics/openAccessoai:figshare.com:article/290770002025-05-15T15:42:10Z
spellingShingle IAM and IEM muxes control code.
Ayesha Waris (21368446)
Microbiology
Biological Sciences not elsewhere classified
Information Systems not elsewhere classified
twiddle factor storage
target fpga platform
resource sharing technique
propose various optimizations
polynomial multiplication based
path delay commutator
number theoretic transform
minimize resource consumption
input output coefficients
based modular multiplier
based memory units
xlink "> crystals
kyber </ p
xilinx artix
using 29
time product
rom memories
resistant algorithm
pwm operations
presented architectures
ntt ).
national institute
intt architecture
comparable atp
art architectures
architectural level
7 xc7a100t
status_str publishedVersion
title IAM and IEM muxes control code.
title_full IAM and IEM muxes control code.
title_fullStr IAM and IEM muxes control code.
title_full_unstemmed IAM and IEM muxes control code.
title_short IAM and IEM muxes control code.
title_sort IAM and IEM muxes control code.
topic Microbiology
Biological Sciences not elsewhere classified
Information Systems not elsewhere classified
twiddle factor storage
target fpga platform
resource sharing technique
propose various optimizations
polynomial multiplication based
path delay commutator
number theoretic transform
minimize resource consumption
input output coefficients
based modular multiplier
based memory units
xlink "> crystals
kyber </ p
xilinx artix
using 29
time product
rom memories
resistant algorithm
pwm operations
presented architectures
ntt ).
national institute
intt architecture
comparable atp
art architectures
architectural level
7 xc7a100t