Decision-level Gait Fusion for Human Identification at a Distance by Al-Tayyan, Amer

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A kernelization algorithm for d-Hitting Set by Abu-Khzam, Faisal N.

“…For 3-Hitting Set, an arbitrary instance is reduced into an equivalent one that contains at most 5k2+k elements. This kernelization is an improvement over previously known methods that guarantee cubic-order kernels. …”
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A New Hamiltonian Semi-Analytical Approach to Vibration Analysis of Piezoelectric Multi-Layered Plates by Andrianarison, O.

“…The whole piezoelectric multilayered plate’s dynamic stiffness is then built, from which its circular frequencies are computed with the help of the Wittrick-Williams algorithm. A detailed discussion is provided on the implementation aspects, followed by some numerical examples to assess the robustness, accuracy and effectiveness of the proposed method. …”
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Empirical comparison of regression test selection algorithms by Mansour, Nashat

“…These criteria are: number of selected test cases, execution time, precision, inclusiveness, preprocessing requirements, type of maintenance, level of testing, and type of approach. The empirical results show that the five algorithms can be used for different requirements of regression testing. …”
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Intelligent Rapidly-Exploring Random Tree Star Algorithm by Ahmed, Khidir Galal Eldin Khidir

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A genetic algorithm for testable data path synthesis by Harmanani, H.

“…The approach is formulated as an allocation problem and solved using an efficient genetic algorithm that generates cost-effective testable designs. …”
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A neural networks algorithm for data path synthesis by Harmanani, Haidar M.

“…This paper presents a deterministic parallel algorithm to solve the data path allocation problem in high-level synthesis. …”
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Formal synthesis of VLSI layouts from algorithmic specifications by Sait, Sadiq M.

“…In this paper we present a formal approach for high level synthesis. This formal high level syntesis system uses recursive algorithms to model the behaviour to be synthesized. …”
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A comparative study of five regression testing algorithms by Mansour, N.

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Spectrum Sensing Algorithms for Cooperative Cognitive Radio Networks by Hassan, Yasmin Adel

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Adaptive Chip-Level Channel Estimation for IMT-DS System: DL and UL by SHEIKH, ASRAR

“…In this paper, chip-level adaptive channel estimation has been explored by using LMS algorithm for wideband CDMA channel estimation. …”
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A simplified sliding‐mode control method for multi‐level transformerless DVR by Hasan Komurcugil (16388513)

“…<p dir="ltr">Here, a finite-control-set sliding-mode control (FCS-SMC) method is proposed for single-phase three-level T-type inverter-based transformerless dynamic voltage restorers (TDVRs). …”

Digital-Twin-Based Diagnosis and Tolerant Control of T-Type Three-Level Rectifiers by Ali Sharida (17947847)

“…<p dir="ltr">This article proposes a digital twin (DT)-based diagnosis and fault-tolerant control for T-type three-level rectifiers. To develop the DT, a dense deep neural network (DNN) machine learning approach is used. …”

Block constrained pressure residual preconditioning for two-phase flow in porous media by mixed hybrid finite elements by Stefano Nardean (14151900)

“…<p dir="ltr">This work proposes an original preconditioner that couples the Constrained Pressure Residual (CPR) method with block preconditioning for the efficient solution of the linearized systems of equations arising from fully implicit multiphase flow models. …”

Exploring Semi-Supervised Learning Algorithms for Camera Trap Images by Sajun, Ali Reza

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Efficient Dynamic Cost Scheduling Algorithm for Data Batch Processing by Al Sadawi, Alia

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Synthesis of MVL Functions - Part I: The Genetic Algorithm Approach by Sarif, Bambang

“…The algorithm is tested using 200 randomly generated 2-variable 4-valued functions. …”
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Decision-level fusion for single-view gait recognition with various carrying and clothing conditions by Al-Tayyan, Amer

“…Gait samples are fed into the MPCA and MPCALDA algorithms using a novel tensor-based form of the gait images. …”
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A method for optimizing test bus assignment and sizing for system-on-a-chip by Harmanani, Haidar M.

“…Test access mechanism (TAM) is an important element of test access architectures for embedded cores and is responsible for on-chip test patterns transport from the source to the core under test to the sink. …”
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A Framework for Predictive Modeling in Sustainable Projects by Labban, Tarek

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