The diagram of the reactor’s moderator design node, containing the primary piping. by H Abdelfattah (17854644)

Primary training parameters for the model. by Junjie Lu (160350)

Experimental observation of gastruloids and shape quantification using LOCO-EFA. by Martijn A. de Jong (17896732)

Image 1_A multimodal AI-driven framework for cardiovascular screening and risk assessment in diverse athletic populations: innovations in sports cardiology.png by Minjin Guo (22751300)

Thesis-RAMIS-Figs_Slides by Felipe Santibañez-Leal (10967991)

“…<br><br>Finally, although the developed concepts, ideas and algorithms have been developed for inverse problems in geostatistics, the results are applicable to a wide range of disciplines where similar sampling problems need to be faced, included but not limited to design of communication networks, optimal integration and communication of swarms of robots and drones, remote sensing.…”

An Ecological Benchmark of Photo Editing Software: A Comparative Analysis of Local vs. Cloud Workflows by Pierre-Alexis DELAROCHE (22092572)

“…Technical Architecture Overview Computational Environment Specifications Our experimental infrastructure leverages a heterogeneous multi-node computational topology encompassing three distinct hardware abstraction layers: Node Configuration Alpha (Intel-NVIDIA Heterogeneous Architecture) Processor: Intel Core i7-12700K (Alder Lake microarchitecture) - 12-core hybrid architecture (8 P-cores + 4 E-cores) - Base frequency: 3.6 GHz, Max turbo: 5.0 GHz - Cache hierarchy: 32KB L1I + 48KB L1D per P-core, 12MB L3 shared - Instruction set extensions: AVX2, AVX-512, SSE4.2 - Thermal design power: 125W (PL1), 190W (PL2) Memory Subsystem: 32GB DDR4-3200 JEDEC-compliant DIMM - Dual-channel configuration, ECC-disabled - Memory controller integrated within CPU die - Peak theoretical bandwidth: 51.2 GB/s GPU Accelerator: NVIDIA GeForce RTX 3070 (GA104 silicon) - CUDA compute capability: 8.6 - RT cores: 46 (2nd gen), Tensor cores: 184 (3rd gen) - Memory: 8GB GDDR6 @ 448 GB/s bandwidth - PCIe 4.0 x16 interface with GPU Direct RDMA support Node Configuration Beta (AMD Zen3+ Architecture) Processor: AMD Ryzen 7 5800X (Zen 3 microarchitecture) - 8-core monolithic design, simultaneous multithreading enabled - Base frequency: 3.8 GHz, Max boost: 4.7 GHz - Cache hierarchy: 32KB L1I + 32KB L1D per core, 32MB L3 shared - Infinity Fabric interconnect @ 1800 MHz - Thermal design power: 105W Memory Subsystem: 16GB DDR4-3600 overclocked configuration - Dual-channel with optimized subtimings (CL16-19-19-39) - Memory controller frequency: 1800 MHz (1:1 FCLK ratio) GPU Accelerator: NVIDIA GeForce GTX 1660 (TU116 silicon) - CUDA compute capability: 7.5 - Memory: 6GB GDDR5 @ 192 GB/s bandwidth - Turing shader architecture without RT/Tensor cores Node Configuration Gamma (Intel Raptor Lake High-Performance) Processor: Intel Core i9-13900K (Raptor Lake microarchitecture) - 24-core hybrid topology (8 P-cores + 16 E-cores) - P-core frequency: 3.0 GHz base, 5.8 GHz max turbo - E-core frequency: 2.2 GHz base, 4.3 GHz max turbo - Cache hierarchy: 36MB L3 shared, Intel Smart Cache technology - Thermal velocity boost with thermal monitoring Memory Subsystem: 64GB DDR5-5600 high-bandwidth configuration - Quad-channel topology with advanced error correction - Peak theoretical bandwidth: 89.6 GB/s GPU Accelerator: NVIDIA GeForce RTX 4080 (AD103 silicon) - Ada Lovelace architecture, CUDA compute capability: 8.9 - RT cores: 76 (3rd gen), Tensor cores: 304 (4th gen) - Memory: 16GB GDDR6X @ 716.8 GB/s bandwidth - PCIe 4.0 x16 with NVLink-ready topology Instrumentation and Telemetry Framework Power Consumption Monitoring Infrastructure Our energy profiling subsystem employs a multi-layered approach to capture granular power consumption metrics across the entire computational stack: Hardware Performance Counters (HPC): Intel RAPL (Running Average Power Limit) interface for CPU package power measurement with sub-millisecond resolution GPU Telemetry: NVIDIA Management Library (NVML) API for real-time GPU power draw monitoring via PCIe sideband signaling System-level PMU: Performance Monitoring Unit instrumentation leveraging MSR (Model Specific Register) access for architectural event sampling Network Interface Telemetry: SNMP-based monitoring of NIC power consumption during cloud upload/download phases Temporal Synchronization Protocol All measurement vectors utilize high-resolution performance counters (HPET) with nanosecond precision timestamps, synchronized via Network Time Protocol (NTP) to ensure temporal coherence across distributed measurement points. …”