(HSCRC) Scheme-1 encoding. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Comparative graph depicting power consumption. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Design methodology followed for the hardware. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Block diagram for 10-bit input. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Comparative graph depicting worst case delay. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Comparative results with state of art design. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Data showing reduction in power usage. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Data showing change in worst case delay. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Comparative graph depicting area used. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Complete layout of the proposed architecture. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

GR encoding example for M = 4 [2]. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Data showing number of bits used. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

Comparative graph depicting bit usage. by R. Sakthivel (2589547)

“…The algorithm was developed and coded in Verilog and simulated using Modelsim. …”

JAG2025-cloud-top-properties by Chuanye Shi (18154549)

“…<br><br>LUT2010.txt, LUT2012.txt, LUT2014.txt are used to form the total LUT. And they are generated using the code "BuildBUT.py"<br><br>BuildBUT.py is the code used for generating the LUT. …”

BABAPPA GUI: A Codeml-Centered Positive Selection Analysis Software by Krishnendu Sinha (22324114)

“…</li><li>Use Inno Setup Compiler with <code>babappa_installer.iss</code> for Windows installer generation.…”

CSPP instance by peixiang wang (19499344)

“…<p dir="ltr">This Python script (<code>instance_generator.py</code>) is a tool designed to <b>programmatically generate synthetic instance data for container stowage and logistics problems.…”

DMP4P: Tailoring Daily Meal Plans to Personalized Nutrient Requirements for Chronic Disease Prevention by LEI ZHAO (22266391)

“…The complete database archived on Figshare (DOI:10.6084/m9.figshare.30153778), with generating code on GitHub, an interactive website, and APIs provided for broad access.…”

Single neurons in the human substantia nigra encode social learning signals by Arianna Davis (21370643)

“…Lastly, use the regression scripts to relate continuous firing rates to behavioral variables and also to generate relevant visualizations. All figures in the paper were generated using the code provided in these scripts. …”

Synthetic dataset of 100 fundus auto fluorescence of inherited retinal disease by Nikolas Pontikos (6779939)

“…Each folder contains 100 synthetic Fundus Auto Fluorescence images generated by the SynthEye algorithm (<a href="https://www.ophthalmologyscience.org/article/S2666-9145(22)00147-6/fulltext" rel="nofollow" target="_blank">https://www.ophthalmologyscience.org/article/S2666-9145(22)00147-6/fulltext</a>).…”

Hydrangea by Yuchen Shao (20601689)

“…Here we use the abbreviations: ST refer to fail-stops, IC refer to incorrectness, SL refer to slower execution, UI refer to unfriendly user interface, TK refer to more tokens, and IS refer to insecure.</li><li><b>source-code locations</b>: The location of the code file where the defect occurs.…”