Showing 481 - 500 results of 571 for search 'path optimization algorithm', query time: 0.13s Refine Results
  1. 481

    Unified CT/GS radix-2 butterfly architecture. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  2. 482

    PUs connected in pipelined SDFNTT for Kyber. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  3. 483

    Dataflow of first two stages for Kyber SDFNTT. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  4. 484

    Dataflow in an 8-point SDF unit. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  5. 485

    Montgomery reduction unit. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  6. 486

    Dataflow in FIFO for depth 4. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  7. 487

    8-point DIF NTT dataflow. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  8. 488

    Radix-2 butterfly structure. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  9. 489

    PUs connected in Kyber SDFNTT. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  10. 490

    12x12 bit integer multiplication unit. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  11. 491

    6x6 bit integer multiplication unit. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  12. 492

    Data collision free processing unit. by Ayesha Waris (21368446)

    Published 2025
    “…This work presents an FPGA implementation of conflict-free and pipelined single-path delay feedback based NTT core for Kyber by employing various architectural optimizations including pipelining, resource sharing and algorithmic optimizations like multiplier-less Montgomery reduction algorithm. …”
  13. 493

    The String Method with Swarms of Trajectories: A Tutorial for Free-Energy Calculations Along a Zero-Drift Pathway by Chenyu Tang (16639678)

    Published 2025
    “…The free-energy change along this path is then estimated using the path-collective variables (PCV) coordinate in the framework of the adaptive biasing force (ABF) importance-sampling algorithm.…”
  14. 494

    Passenger flow of Jinan Railway Bureau in 2019. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”
  15. 495

    Relevant literature research content statistics. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”
  16. 496

    Train timetable data. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”
  17. 497

    Sample of train service network. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”
  18. 498

    Notations definition table. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”
  19. 499

    Calculation of passenger time value. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”
  20. 500

    Train classification decision table. by Jiren CAO (20442214)

    Published 2024
    “…The model aimed at maximize the corporate revenue and maximize passenger travel benefit, and was solved by large neighborhood search heuristic algorithm and path size logit assignment based on capacity constraint-passenger flow increment accurate algorithm. …”