Decreasing the Power-Clock Resonant Signal Central Voltage as a Mean for Power Reduction in Integrated Power and Clock Distribution Networks

Decreasing the Power-Clock Resonant Signal Central Voltage as a Mean for Power Reduction in Integrated Power and Clock Distribution Networks

Saved in:
Bibliographic Details
Main Author: Esmaeili, Seyed (author)
Other Authors: Fawzi, Abeer (author)
Published: 2021
Online Access:https://dspace.auk.edu.kw/handle/11675/9637
https://indjst.org/articles/decreasing-the-power-clock-resonant-signal-central-voltage-as-a-mean-for-power-reduction-in-integrated-power-and-clock-dis
Tags: Add Tag
No Tags, Be the first to tag this record!

Internet

https://dspace.auk.edu.kw/handle/11675/9637
https://indjst.org/articles/decreasing-the-power-clock-resonant-signal-central-voltage-as-a-mean-for-power-reduction-in-integrated-power-and-clock-dis

Similar Items