Efficient test relaxation techniques for combinational logic circuits

Efficient test relaxation techniques for combinational logic circuits

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Bibliographic Details
Main Author:	Al-Suwaiyan, Ali Saleh Mohammed (author)
Other Authors:	unknown (author)
Format:	masterThesis
Published:	2002
Subjects:	Computer
Online Access:	https://eprints.kfupm.edu.sa/id/eprint/10403/1/10403.pdf
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