HARDWARE DESIGN AND VLSI IMPLEMENTATION OF A BYTE-WISE CRC GENERATOR CHIP
In this paper the ahrdware design and VLSi implementation of a byte-wise CRC generator is presented. The algorithm is based on the work presented in [10] in which a software implementation was proposed. The byte-wise CRC algorithm is translated to hardware and expressed in AHPL [6]. The method used...
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| Format: | article |
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2020
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/294/1/J_Sait_CE_February1995.pdf |
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