BIT-SLICE MICROPROCESSOR-BASED COMMUNICATIONS DECODER
Abstract The hardware design of a bit-slice microprocessor-based realtime cyclic error-correcting communications decoder is presented. A microprocessor-based architecture is preferred because of its programmability, low cost and simplicity of design. To augment the throughput of the decoder for real...
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| Other Authors: | , , |
| Format: | article |
| Published: |
2020
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/303/1/bit_slice.pdf |
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