A novel technique for fast multiplication
In this paper we present the design of a new high speed multiplication unit. The design is based on non-overlapped scanning of 3-bit fields of the multiplier. In this algorithm the partial products of the multiplicand and three bits of the multiplier are pre-calculated using only hardwired shifts. T...
Saved in:
| Main Author: | |
|---|---|
| Other Authors: | , , |
| Format: | article |
| Published: |
1995
|
| Subjects: | |
| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/14170/1/14170_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14170/2/14170_2.doc |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Be the first to leave a comment!