PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE
This paper presents a novel approach for the design and implementation of a simulation platform for evaluating LDPC codes performance. The existing LDPC code simulation tools consume very long time in evaluating the performance of a specific code design. This is due to the intensive number of requir...
محفوظ في:
| المؤلف الرئيسي: | |
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| مؤلفون آخرون: | , , |
| التنسيق: | article |
| منشور في: |
2007
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://eprints.kfupm.edu.sa/id/eprint/166/1/PARALLEL_COMPUTING_PLATFORM_ICSPC07.pdf |
| الوسوم: |
إضافة وسم
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| _version_ | 1864513388185387008 |
|---|---|
| author | Alghonaim, Esa |
| author2 | El-Maleh, Aiman H. Andalusi, Adnan unknown |
| author2_role | author author author |
| author_facet | Alghonaim, Esa El-Maleh, Aiman H. Andalusi, Adnan unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Alghonaim, Esa El-Maleh, Aiman H. Andalusi, Adnan unknown |
| dc.date.none.fl_str_mv | 2007-11 2020 |
| dc.format.none.fl_str_mv | application/pdf |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/166/1/PARALLEL_COMPUTING_PLATFORM_ICSPC07.pdf (2007) PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE. IEEE International Conference on Signal Processing and Communications. pp. 157-160. |
| dc.language.none.fl_str_mv | en |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/166/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer Electrical |
| dc.title.none.fl_str_mv | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | This paper presents a novel approach for the design and implementation of a simulation platform for evaluating LDPC codes performance. The existing LDPC code simulation tools consume very long time in evaluating the performance of a specific code design. This is due to the intensive number of required computations. This problem is overcome by developing a parallel protocol to distribute the computations among processing nodes in a TCP/IP network. As indicated by experimental results, the proposed simulation platform is scalable with the number of processing nodes. Another practical advantage of the proposed system is that it does not need dedicated processors to run it; rather, it can utilize idle times of processing nodes in a network and work transparent to a node user. Furthermore, network daemons are used to utilize network nodes even if they are in the log-off state. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_8b29e6a6c0f36d13a3e11c9cc0c00bea |
| identifier_str_mv | (2007) PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE. IEEE International Conference on Signal Processing and Communications. pp. 157-160. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::166 |
| publishDate | 2007 |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCEAlghonaim, EsaEl-Maleh, Aiman H.Andalusi, AdnanunknownComputerElectricalThis paper presents a novel approach for the design and implementation of a simulation platform for evaluating LDPC codes performance. The existing LDPC code simulation tools consume very long time in evaluating the performance of a specific code design. This is due to the intensive number of required computations. This problem is overcome by developing a parallel protocol to distribute the computations among processing nodes in a TCP/IP network. As indicated by experimental results, the proposed simulation platform is scalable with the number of processing nodes. Another practical advantage of the proposed system is that it does not need dedicated processors to run it; rather, it can utilize idle times of processing nodes in a network and work transparent to a node user. Furthermore, network daemons are used to utilize network nodes even if they are in the log-off state.2007-112020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://eprints.kfupm.edu.sa/id/eprint/166/1/PARALLEL_COMPUTING_PLATFORM_ICSPC07.pdf (2007) PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE. IEEE International Conference on Signal Processing and Communications. pp. 157-160. enhttps://eprints.kfupm.edu.sa/id/eprint/166/info:eu-repo/semantics/openAccessoai::1662019-11-01T13:22:43Z |
| spellingShingle | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE Alghonaim, Esa Computer Electrical |
| status_str | publishedVersion |
| title | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| title_full | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| title_fullStr | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| title_full_unstemmed | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| title_short | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| title_sort | PARALLEL COMPUTING PLATFORM FOR EVALUATING LDPC CODES PERFORMANCE |
| topic | Computer Electrical |
| url | https://eprints.kfupm.edu.sa/id/eprint/166/1/PARALLEL_COMPUTING_PLATFORM_ICSPC07.pdf |