Digital circuit design through simulated evolution (SimE)
In this paper, the use of simulated evolution (SimE) algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection and allocation. Two goodness measures are designed to guide the selection and allocation operations of SimE. Area, power a...
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| Other Authors: | , , , |
| Format: | article |
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2003
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| Online Access: | https://eprints.kfupm.edu.sa/id/eprint/14219/1/14219_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14219/2/14219_2.doc |
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| _version_ | 1864513384058191872 |
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| author | Sait, Sadiq M. |
| author2 | Abd-El-Barr, Mostafa Al-Saiari, U.S. Sarif, B.A.B. unknown |
| author2_role | author author author author |
| author_facet | Sait, Sadiq M. Abd-El-Barr, Mostafa Al-Saiari, U.S. Sarif, B.A.B. unknown |
| author_role | author |
| dc.creator.none.fl_str_mv | Sait, Sadiq M. Abd-El-Barr, Mostafa Al-Saiari, U.S. Sarif, B.A.B. unknown |
| dc.date.none.fl_str_mv | 2003-12 2020 |
| dc.format.none.fl_str_mv | application/pdf application/msword |
| dc.identifier.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14219/1/14219_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14219/2/14219_2.doc (2003) Digital circuit design through simulated evolution (SimE). Evolutionary Computation, 2003. CEC '03. The 2003 Congress on, 1. |
| dc.language.none.fl_str_mv | en en |
| dc.publisher.none.fl_str_mv | IEEE |
| dc.relation.none.fl_str_mv | https://eprints.kfupm.edu.sa/id/eprint/14219/ |
| dc.rights.*.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.subject.none.fl_str_mv | Computer |
| dc.title.none.fl_str_mv | Digital circuit design through simulated evolution (SimE) |
| dc.type.none.fl_str_mv | Article PeerReviewed info:eu-repo/semantics/publishedVersion info:eu-repo/semantics/article |
| description | In this paper, the use of simulated evolution (SimE) algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection and allocation. Two goodness measures are designed to guide the selection and allocation operations of SimE. Area, power and delay are considered in the optimization of circuits. Results obtained by SimE algorithm are compared to those obtained by genetic algorithm (GA). |
| eu_rights_str_mv | openAccess |
| format | article |
| id | KFUPM_c68b69f81a8951acc7e87edf1fa3513b |
| identifier_str_mv | (2003) Digital circuit design through simulated evolution (SimE). Evolutionary Computation, 2003. CEC '03. The 2003 Congress on, 1. |
| language_invalid_str_mv | en |
| network_acronym_str | KFUPM |
| network_name_str | King Fahd University of Petroleum and Minerals |
| oai_identifier_str | oai::14219 |
| publishDate | 2003 |
| publisher.none.fl_str_mv | IEEE |
| repository.mail.fl_str_mv | |
| repository.name.fl_str_mv | |
| repository_id_str | |
| spelling | Digital circuit design through simulated evolution (SimE)Sait, Sadiq M.Abd-El-Barr, MostafaAl-Saiari, U.S.Sarif, B.A.B.unknownComputerIn this paper, the use of simulated evolution (SimE) algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection and allocation. Two goodness measures are designed to guide the selection and allocation operations of SimE. Area, power and delay are considered in the optimization of circuits. Results obtained by SimE algorithm are compared to those obtained by genetic algorithm (GA).IEEE2003-122020ArticlePeerReviewedinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfapplication/mswordhttps://eprints.kfupm.edu.sa/id/eprint/14219/1/14219_1.pdfhttps://eprints.kfupm.edu.sa/id/eprint/14219/2/14219_2.doc (2003) Digital circuit design through simulated evolution (SimE). Evolutionary Computation, 2003. CEC '03. The 2003 Congress on, 1. enenhttps://eprints.kfupm.edu.sa/id/eprint/14219/info:eu-repo/semantics/openAccessoai::142192019-11-01T14:04:46Z |
| spellingShingle | Digital circuit design through simulated evolution (SimE) Sait, Sadiq M. Computer |
| status_str | publishedVersion |
| title | Digital circuit design through simulated evolution (SimE) |
| title_full | Digital circuit design through simulated evolution (SimE) |
| title_fullStr | Digital circuit design through simulated evolution (SimE) |
| title_full_unstemmed | Digital circuit design through simulated evolution (SimE) |
| title_short | Digital circuit design through simulated evolution (SimE) |
| title_sort | Digital circuit design through simulated evolution (SimE) |
| topic | Computer |
| url | https://eprints.kfupm.edu.sa/id/eprint/14219/1/14219_1.pdf https://eprints.kfupm.edu.sa/id/eprint/14219/2/14219_2.doc |