APA (7th ed.) Citation

Ouaiss, I., Govindarajan, S., Srinivasan, V., Kaul, M., & Vemuri, R. (2017). An integrated partitioning and synthesis system for dynamically reconfigurable Multi-FPGA architectures.

Chicago Style (17th ed.) Citation

Ouaiss, Iyad, Sriram Govindarajan, Vinoo Srinivasan, Meenakshi Kaul, and Ranga Vemuri. An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures. 2017.

MLA (9th ed.) Citation

Ouaiss, Iyad, et al. An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures. 2017.