A genetic algorithm for testable data path synthesis

A genetic algorithm for testable data path synthesis

A high level synthesis for testability method is presented with the objective to generate testable resistor transistor logic designs from behavioral descriptions. The approach is formulated as an allocation problem and solved using an efficient genetic algorithm that generates cost-effective testabl...

وصف كامل

محفوظ في:

التفاصيل البيبلوغرافية
المؤلف الرئيسي:	Harmanani, H. (author)
مؤلفون آخرون:	Saliba, R. (author), Khoury, M. (author)
التنسيق:	conferenceObject
منشور في:	2017
الوصول للمادة أونلاين:	http://hdl.handle.net/10725/5462 http://dx.doi.org/10.1109/CCECE.2001.933689 http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php http://ieeexplore.ieee.org/abstract/document/933689/
الوسوم:	إضافة وسم لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!

مواد مشابهة

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