Sait, S. M., Elleithy, K., Masud, u., & unknown. (2020). Formal synthesis of VLSI layouts from algorithmic specifications.
Chicago Style (17th ed.) CitationSait, Sadiq M., K. Elleithy, ulHasan Masud, and unknown. Formal Synthesis of VLSI Layouts from Algorithmic Specifications. 2020.
MLA (9th ed.) CitationSait, Sadiq M., et al. Formal Synthesis of VLSI Layouts from Algorithmic Specifications. 2020.
Warning: These citations may not always be 100% accurate.